xonar_wm87x6.c 38 KB

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  1. /*
  2. * card driver for models with WM8776/WM8766 DACs (Xonar DS/HDAV1.3 Slim)
  3. *
  4. * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
  5. *
  6. *
  7. * This driver is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License, version 2.
  9. *
  10. * This driver is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this driver; if not, see <http://www.gnu.org/licenses/>.
  17. */
  18. /*
  19. * Xonar DS
  20. * --------
  21. *
  22. * CMI8788:
  23. *
  24. * SPI 0 -> WM8766 (surround, center/LFE, back)
  25. * SPI 1 -> WM8776 (front, input)
  26. *
  27. * GPIO 4 <- headphone detect, 0 = plugged
  28. * GPIO 6 -> route input jack to mic-in (0) or line-in (1)
  29. * GPIO 7 -> enable output to front L/R speaker channels
  30. * GPIO 8 -> enable output to other speaker channels and front panel headphone
  31. *
  32. * WM8776:
  33. *
  34. * input 1 <- line
  35. * input 2 <- mic
  36. * input 3 <- front mic
  37. * input 4 <- aux
  38. */
  39. /*
  40. * Xonar HDAV1.3 Slim
  41. * ------------------
  42. *
  43. * CMI8788:
  44. *
  45. * I²C <-> WM8776 (addr 0011010)
  46. *
  47. * GPIO 0 -> disable HDMI output
  48. * GPIO 1 -> enable HP output
  49. * GPIO 6 -> firmware EEPROM I²C clock
  50. * GPIO 7 <-> firmware EEPROM I²C data
  51. *
  52. * UART <-> HDMI controller
  53. *
  54. * WM8776:
  55. *
  56. * input 1 <- mic
  57. * input 2 <- aux
  58. */
  59. #include <linux/pci.h>
  60. #include <linux/delay.h>
  61. #include <sound/control.h>
  62. #include <sound/core.h>
  63. #include <sound/info.h>
  64. #include <sound/jack.h>
  65. #include <sound/pcm.h>
  66. #include <sound/pcm_params.h>
  67. #include <sound/tlv.h>
  68. #include "xonar.h"
  69. #include "wm8776.h"
  70. #include "wm8766.h"
  71. #define GPIO_DS_HP_DETECT 0x0010
  72. #define GPIO_DS_INPUT_ROUTE 0x0040
  73. #define GPIO_DS_OUTPUT_FRONTLR 0x0080
  74. #define GPIO_DS_OUTPUT_ENABLE 0x0100
  75. #define GPIO_SLIM_HDMI_DISABLE 0x0001
  76. #define GPIO_SLIM_OUTPUT_ENABLE 0x0002
  77. #define GPIO_SLIM_FIRMWARE_CLK 0x0040
  78. #define GPIO_SLIM_FIRMWARE_DATA 0x0080
  79. #define I2C_DEVICE_WM8776 0x34 /* 001101, 0, /W=0 */
  80. #define LC_CONTROL_LIMITER 0x40000000
  81. #define LC_CONTROL_ALC 0x20000000
  82. struct xonar_wm87x6 {
  83. struct xonar_generic generic;
  84. u16 wm8776_regs[0x17];
  85. u16 wm8766_regs[0x10];
  86. struct snd_kcontrol *line_adcmux_control;
  87. struct snd_kcontrol *mic_adcmux_control;
  88. struct snd_kcontrol *lc_controls[13];
  89. struct snd_jack *hp_jack;
  90. struct xonar_hdmi hdmi;
  91. };
  92. static void wm8776_write_spi(struct oxygen *chip,
  93. unsigned int reg, unsigned int value)
  94. {
  95. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  96. OXYGEN_SPI_DATA_LENGTH_2 |
  97. OXYGEN_SPI_CLOCK_160 |
  98. (1 << OXYGEN_SPI_CODEC_SHIFT) |
  99. OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
  100. (reg << 9) | value);
  101. }
  102. static void wm8776_write_i2c(struct oxygen *chip,
  103. unsigned int reg, unsigned int value)
  104. {
  105. oxygen_write_i2c(chip, I2C_DEVICE_WM8776,
  106. (reg << 1) | (value >> 8), value);
  107. }
  108. static void wm8776_write(struct oxygen *chip,
  109. unsigned int reg, unsigned int value)
  110. {
  111. struct xonar_wm87x6 *data = chip->model_data;
  112. if ((chip->model.function_flags & OXYGEN_FUNCTION_2WIRE_SPI_MASK) ==
  113. OXYGEN_FUNCTION_SPI)
  114. wm8776_write_spi(chip, reg, value);
  115. else
  116. wm8776_write_i2c(chip, reg, value);
  117. if (reg < ARRAY_SIZE(data->wm8776_regs)) {
  118. if (reg >= WM8776_HPLVOL && reg <= WM8776_DACMASTER)
  119. value &= ~WM8776_UPDATE;
  120. data->wm8776_regs[reg] = value;
  121. }
  122. }
  123. static void wm8776_write_cached(struct oxygen *chip,
  124. unsigned int reg, unsigned int value)
  125. {
  126. struct xonar_wm87x6 *data = chip->model_data;
  127. if (reg >= ARRAY_SIZE(data->wm8776_regs) ||
  128. value != data->wm8776_regs[reg])
  129. wm8776_write(chip, reg, value);
  130. }
  131. static void wm8766_write(struct oxygen *chip,
  132. unsigned int reg, unsigned int value)
  133. {
  134. struct xonar_wm87x6 *data = chip->model_data;
  135. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  136. OXYGEN_SPI_DATA_LENGTH_2 |
  137. OXYGEN_SPI_CLOCK_160 |
  138. (0 << OXYGEN_SPI_CODEC_SHIFT) |
  139. OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
  140. (reg << 9) | value);
  141. if (reg < ARRAY_SIZE(data->wm8766_regs)) {
  142. if ((reg >= WM8766_LDA1 && reg <= WM8766_RDA1) ||
  143. (reg >= WM8766_LDA2 && reg <= WM8766_MASTDA))
  144. value &= ~WM8766_UPDATE;
  145. data->wm8766_regs[reg] = value;
  146. }
  147. }
  148. static void wm8766_write_cached(struct oxygen *chip,
  149. unsigned int reg, unsigned int value)
  150. {
  151. struct xonar_wm87x6 *data = chip->model_data;
  152. if (reg >= ARRAY_SIZE(data->wm8766_regs) ||
  153. value != data->wm8766_regs[reg])
  154. wm8766_write(chip, reg, value);
  155. }
  156. static void wm8776_registers_init(struct oxygen *chip)
  157. {
  158. struct xonar_wm87x6 *data = chip->model_data;
  159. wm8776_write(chip, WM8776_RESET, 0);
  160. wm8776_write(chip, WM8776_PHASESWAP, WM8776_PH_MASK);
  161. wm8776_write(chip, WM8776_DACCTRL1, WM8776_DZCEN |
  162. WM8776_PL_LEFT_LEFT | WM8776_PL_RIGHT_RIGHT);
  163. wm8776_write(chip, WM8776_DACMUTE, chip->dac_mute ? WM8776_DMUTE : 0);
  164. wm8776_write(chip, WM8776_DACIFCTRL,
  165. WM8776_DACFMT_LJUST | WM8776_DACWL_24);
  166. wm8776_write(chip, WM8776_ADCIFCTRL,
  167. data->wm8776_regs[WM8776_ADCIFCTRL]);
  168. wm8776_write(chip, WM8776_MSTRCTRL, data->wm8776_regs[WM8776_MSTRCTRL]);
  169. wm8776_write(chip, WM8776_PWRDOWN, data->wm8776_regs[WM8776_PWRDOWN]);
  170. wm8776_write(chip, WM8776_HPLVOL, data->wm8776_regs[WM8776_HPLVOL]);
  171. wm8776_write(chip, WM8776_HPRVOL, data->wm8776_regs[WM8776_HPRVOL] |
  172. WM8776_UPDATE);
  173. wm8776_write(chip, WM8776_ADCLVOL, data->wm8776_regs[WM8776_ADCLVOL]);
  174. wm8776_write(chip, WM8776_ADCRVOL, data->wm8776_regs[WM8776_ADCRVOL]);
  175. wm8776_write(chip, WM8776_ADCMUX, data->wm8776_regs[WM8776_ADCMUX]);
  176. wm8776_write(chip, WM8776_DACLVOL, chip->dac_volume[0]);
  177. wm8776_write(chip, WM8776_DACRVOL, chip->dac_volume[1] | WM8776_UPDATE);
  178. }
  179. static void wm8766_registers_init(struct oxygen *chip)
  180. {
  181. struct xonar_wm87x6 *data = chip->model_data;
  182. wm8766_write(chip, WM8766_RESET, 0);
  183. wm8766_write(chip, WM8766_DAC_CTRL, data->wm8766_regs[WM8766_DAC_CTRL]);
  184. wm8766_write(chip, WM8766_INT_CTRL, WM8766_FMT_LJUST | WM8766_IWL_24);
  185. wm8766_write(chip, WM8766_DAC_CTRL2,
  186. WM8766_ZCD | (chip->dac_mute ? WM8766_DMUTE_MASK : 0));
  187. wm8766_write(chip, WM8766_LDA1, chip->dac_volume[2]);
  188. wm8766_write(chip, WM8766_RDA1, chip->dac_volume[3]);
  189. wm8766_write(chip, WM8766_LDA2, chip->dac_volume[4]);
  190. wm8766_write(chip, WM8766_RDA2, chip->dac_volume[5]);
  191. wm8766_write(chip, WM8766_LDA3, chip->dac_volume[6]);
  192. wm8766_write(chip, WM8766_RDA3, chip->dac_volume[7] | WM8766_UPDATE);
  193. }
  194. static void wm8776_init(struct oxygen *chip)
  195. {
  196. struct xonar_wm87x6 *data = chip->model_data;
  197. data->wm8776_regs[WM8776_HPLVOL] = (0x79 - 60) | WM8776_HPZCEN;
  198. data->wm8776_regs[WM8776_HPRVOL] = (0x79 - 60) | WM8776_HPZCEN;
  199. data->wm8776_regs[WM8776_ADCIFCTRL] =
  200. WM8776_ADCFMT_LJUST | WM8776_ADCWL_24 | WM8776_ADCMCLK;
  201. data->wm8776_regs[WM8776_MSTRCTRL] =
  202. WM8776_ADCRATE_256 | WM8776_DACRATE_256;
  203. data->wm8776_regs[WM8776_PWRDOWN] = WM8776_HPPD;
  204. data->wm8776_regs[WM8776_ADCLVOL] = 0xa5 | WM8776_ZCA;
  205. data->wm8776_regs[WM8776_ADCRVOL] = 0xa5 | WM8776_ZCA;
  206. data->wm8776_regs[WM8776_ADCMUX] = 0x001;
  207. wm8776_registers_init(chip);
  208. }
  209. static void wm8766_init(struct oxygen *chip)
  210. {
  211. struct xonar_wm87x6 *data = chip->model_data;
  212. data->wm8766_regs[WM8766_DAC_CTRL] =
  213. WM8766_PL_LEFT_LEFT | WM8766_PL_RIGHT_RIGHT;
  214. wm8766_registers_init(chip);
  215. }
  216. static void xonar_ds_handle_hp_jack(struct oxygen *chip)
  217. {
  218. struct xonar_wm87x6 *data = chip->model_data;
  219. bool hp_plugged;
  220. unsigned int reg;
  221. mutex_lock(&chip->mutex);
  222. hp_plugged = !(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
  223. GPIO_DS_HP_DETECT);
  224. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  225. hp_plugged ? 0 : GPIO_DS_OUTPUT_FRONTLR,
  226. GPIO_DS_OUTPUT_FRONTLR);
  227. reg = data->wm8766_regs[WM8766_DAC_CTRL] & ~WM8766_MUTEALL;
  228. if (hp_plugged)
  229. reg |= WM8766_MUTEALL;
  230. wm8766_write_cached(chip, WM8766_DAC_CTRL, reg);
  231. snd_jack_report(data->hp_jack, hp_plugged ? SND_JACK_HEADPHONE : 0);
  232. mutex_unlock(&chip->mutex);
  233. }
  234. static void xonar_ds_init(struct oxygen *chip)
  235. {
  236. struct xonar_wm87x6 *data = chip->model_data;
  237. data->generic.anti_pop_delay = 300;
  238. data->generic.output_enable_bit = GPIO_DS_OUTPUT_ENABLE;
  239. wm8776_init(chip);
  240. wm8766_init(chip);
  241. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
  242. GPIO_DS_INPUT_ROUTE | GPIO_DS_OUTPUT_FRONTLR);
  243. oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL,
  244. GPIO_DS_HP_DETECT);
  245. oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_DS_INPUT_ROUTE);
  246. oxygen_set_bits16(chip, OXYGEN_GPIO_INTERRUPT_MASK, GPIO_DS_HP_DETECT);
  247. chip->interrupt_mask |= OXYGEN_INT_GPIO;
  248. xonar_enable_output(chip);
  249. snd_jack_new(chip->card, "Headphone",
  250. SND_JACK_HEADPHONE, &data->hp_jack, false, false);
  251. xonar_ds_handle_hp_jack(chip);
  252. snd_component_add(chip->card, "WM8776");
  253. snd_component_add(chip->card, "WM8766");
  254. }
  255. static void xonar_hdav_slim_init(struct oxygen *chip)
  256. {
  257. struct xonar_wm87x6 *data = chip->model_data;
  258. data->generic.anti_pop_delay = 300;
  259. data->generic.output_enable_bit = GPIO_SLIM_OUTPUT_ENABLE;
  260. wm8776_init(chip);
  261. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
  262. GPIO_SLIM_HDMI_DISABLE |
  263. GPIO_SLIM_FIRMWARE_CLK |
  264. GPIO_SLIM_FIRMWARE_DATA);
  265. xonar_hdmi_init(chip, &data->hdmi);
  266. xonar_enable_output(chip);
  267. snd_component_add(chip->card, "WM8776");
  268. }
  269. static void xonar_ds_cleanup(struct oxygen *chip)
  270. {
  271. xonar_disable_output(chip);
  272. wm8776_write(chip, WM8776_RESET, 0);
  273. }
  274. static void xonar_hdav_slim_cleanup(struct oxygen *chip)
  275. {
  276. xonar_hdmi_cleanup(chip);
  277. xonar_disable_output(chip);
  278. wm8776_write(chip, WM8776_RESET, 0);
  279. msleep(2);
  280. }
  281. static void xonar_ds_suspend(struct oxygen *chip)
  282. {
  283. xonar_ds_cleanup(chip);
  284. }
  285. static void xonar_hdav_slim_suspend(struct oxygen *chip)
  286. {
  287. xonar_hdav_slim_cleanup(chip);
  288. }
  289. static void xonar_ds_resume(struct oxygen *chip)
  290. {
  291. wm8776_registers_init(chip);
  292. wm8766_registers_init(chip);
  293. xonar_enable_output(chip);
  294. xonar_ds_handle_hp_jack(chip);
  295. }
  296. static void xonar_hdav_slim_resume(struct oxygen *chip)
  297. {
  298. struct xonar_wm87x6 *data = chip->model_data;
  299. wm8776_registers_init(chip);
  300. xonar_hdmi_resume(chip, &data->hdmi);
  301. xonar_enable_output(chip);
  302. }
  303. static void wm8776_adc_hardware_filter(unsigned int channel,
  304. struct snd_pcm_hardware *hardware)
  305. {
  306. if (channel == PCM_A) {
  307. hardware->rates = SNDRV_PCM_RATE_32000 |
  308. SNDRV_PCM_RATE_44100 |
  309. SNDRV_PCM_RATE_48000 |
  310. SNDRV_PCM_RATE_64000 |
  311. SNDRV_PCM_RATE_88200 |
  312. SNDRV_PCM_RATE_96000;
  313. hardware->rate_max = 96000;
  314. }
  315. }
  316. static void xonar_hdav_slim_hardware_filter(unsigned int channel,
  317. struct snd_pcm_hardware *hardware)
  318. {
  319. wm8776_adc_hardware_filter(channel, hardware);
  320. xonar_hdmi_pcm_hardware_filter(channel, hardware);
  321. }
  322. static void set_wm87x6_dac_params(struct oxygen *chip,
  323. struct snd_pcm_hw_params *params)
  324. {
  325. }
  326. static void set_wm8776_adc_params(struct oxygen *chip,
  327. struct snd_pcm_hw_params *params)
  328. {
  329. u16 reg;
  330. reg = WM8776_ADCRATE_256 | WM8776_DACRATE_256;
  331. if (params_rate(params) > 48000)
  332. reg |= WM8776_ADCOSR;
  333. wm8776_write_cached(chip, WM8776_MSTRCTRL, reg);
  334. }
  335. static void set_hdav_slim_dac_params(struct oxygen *chip,
  336. struct snd_pcm_hw_params *params)
  337. {
  338. struct xonar_wm87x6 *data = chip->model_data;
  339. xonar_set_hdmi_params(chip, &data->hdmi, params);
  340. }
  341. static void update_wm8776_volume(struct oxygen *chip)
  342. {
  343. struct xonar_wm87x6 *data = chip->model_data;
  344. u8 to_change;
  345. if (chip->dac_volume[0] == chip->dac_volume[1]) {
  346. if (chip->dac_volume[0] != data->wm8776_regs[WM8776_DACLVOL] ||
  347. chip->dac_volume[1] != data->wm8776_regs[WM8776_DACRVOL]) {
  348. wm8776_write(chip, WM8776_DACMASTER,
  349. chip->dac_volume[0] | WM8776_UPDATE);
  350. data->wm8776_regs[WM8776_DACLVOL] = chip->dac_volume[0];
  351. data->wm8776_regs[WM8776_DACRVOL] = chip->dac_volume[0];
  352. }
  353. } else {
  354. to_change = (chip->dac_volume[0] !=
  355. data->wm8776_regs[WM8776_DACLVOL]) << 0;
  356. to_change |= (chip->dac_volume[1] !=
  357. data->wm8776_regs[WM8776_DACLVOL]) << 1;
  358. if (to_change & 1)
  359. wm8776_write(chip, WM8776_DACLVOL, chip->dac_volume[0] |
  360. ((to_change & 2) ? 0 : WM8776_UPDATE));
  361. if (to_change & 2)
  362. wm8776_write(chip, WM8776_DACRVOL,
  363. chip->dac_volume[1] | WM8776_UPDATE);
  364. }
  365. }
  366. static void update_wm87x6_volume(struct oxygen *chip)
  367. {
  368. static const u8 wm8766_regs[6] = {
  369. WM8766_LDA1, WM8766_RDA1,
  370. WM8766_LDA2, WM8766_RDA2,
  371. WM8766_LDA3, WM8766_RDA3,
  372. };
  373. struct xonar_wm87x6 *data = chip->model_data;
  374. unsigned int i;
  375. u8 to_change;
  376. update_wm8776_volume(chip);
  377. if (chip->dac_volume[2] == chip->dac_volume[3] &&
  378. chip->dac_volume[2] == chip->dac_volume[4] &&
  379. chip->dac_volume[2] == chip->dac_volume[5] &&
  380. chip->dac_volume[2] == chip->dac_volume[6] &&
  381. chip->dac_volume[2] == chip->dac_volume[7]) {
  382. to_change = 0;
  383. for (i = 0; i < 6; ++i)
  384. if (chip->dac_volume[2] !=
  385. data->wm8766_regs[wm8766_regs[i]])
  386. to_change = 1;
  387. if (to_change) {
  388. wm8766_write(chip, WM8766_MASTDA,
  389. chip->dac_volume[2] | WM8766_UPDATE);
  390. for (i = 0; i < 6; ++i)
  391. data->wm8766_regs[wm8766_regs[i]] =
  392. chip->dac_volume[2];
  393. }
  394. } else {
  395. to_change = 0;
  396. for (i = 0; i < 6; ++i)
  397. to_change |= (chip->dac_volume[2 + i] !=
  398. data->wm8766_regs[wm8766_regs[i]]) << i;
  399. for (i = 0; i < 6; ++i)
  400. if (to_change & (1 << i))
  401. wm8766_write(chip, wm8766_regs[i],
  402. chip->dac_volume[2 + i] |
  403. ((to_change & (0x3e << i))
  404. ? 0 : WM8766_UPDATE));
  405. }
  406. }
  407. static void update_wm8776_mute(struct oxygen *chip)
  408. {
  409. wm8776_write_cached(chip, WM8776_DACMUTE,
  410. chip->dac_mute ? WM8776_DMUTE : 0);
  411. }
  412. static void update_wm87x6_mute(struct oxygen *chip)
  413. {
  414. update_wm8776_mute(chip);
  415. wm8766_write_cached(chip, WM8766_DAC_CTRL2, WM8766_ZCD |
  416. (chip->dac_mute ? WM8766_DMUTE_MASK : 0));
  417. }
  418. static void update_wm8766_center_lfe_mix(struct oxygen *chip, bool mixed)
  419. {
  420. struct xonar_wm87x6 *data = chip->model_data;
  421. unsigned int reg;
  422. /*
  423. * The WM8766 can mix left and right channels, but this setting
  424. * applies to all three stereo pairs.
  425. */
  426. reg = data->wm8766_regs[WM8766_DAC_CTRL] &
  427. ~(WM8766_PL_LEFT_MASK | WM8766_PL_RIGHT_MASK);
  428. if (mixed)
  429. reg |= WM8766_PL_LEFT_LRMIX | WM8766_PL_RIGHT_LRMIX;
  430. else
  431. reg |= WM8766_PL_LEFT_LEFT | WM8766_PL_RIGHT_RIGHT;
  432. wm8766_write_cached(chip, WM8766_DAC_CTRL, reg);
  433. }
  434. static void xonar_ds_gpio_changed(struct oxygen *chip)
  435. {
  436. xonar_ds_handle_hp_jack(chip);
  437. }
  438. static int wm8776_bit_switch_get(struct snd_kcontrol *ctl,
  439. struct snd_ctl_elem_value *value)
  440. {
  441. struct oxygen *chip = ctl->private_data;
  442. struct xonar_wm87x6 *data = chip->model_data;
  443. u16 bit = ctl->private_value & 0xffff;
  444. unsigned int reg_index = (ctl->private_value >> 16) & 0xff;
  445. bool invert = (ctl->private_value >> 24) & 1;
  446. value->value.integer.value[0] =
  447. ((data->wm8776_regs[reg_index] & bit) != 0) ^ invert;
  448. return 0;
  449. }
  450. static int wm8776_bit_switch_put(struct snd_kcontrol *ctl,
  451. struct snd_ctl_elem_value *value)
  452. {
  453. struct oxygen *chip = ctl->private_data;
  454. struct xonar_wm87x6 *data = chip->model_data;
  455. u16 bit = ctl->private_value & 0xffff;
  456. u16 reg_value;
  457. unsigned int reg_index = (ctl->private_value >> 16) & 0xff;
  458. bool invert = (ctl->private_value >> 24) & 1;
  459. int changed;
  460. mutex_lock(&chip->mutex);
  461. reg_value = data->wm8776_regs[reg_index] & ~bit;
  462. if (value->value.integer.value[0] ^ invert)
  463. reg_value |= bit;
  464. changed = reg_value != data->wm8776_regs[reg_index];
  465. if (changed)
  466. wm8776_write(chip, reg_index, reg_value);
  467. mutex_unlock(&chip->mutex);
  468. return changed;
  469. }
  470. static int wm8776_field_enum_info(struct snd_kcontrol *ctl,
  471. struct snd_ctl_elem_info *info)
  472. {
  473. static const char *const hld[16] = {
  474. "0 ms", "2.67 ms", "5.33 ms", "10.6 ms",
  475. "21.3 ms", "42.7 ms", "85.3 ms", "171 ms",
  476. "341 ms", "683 ms", "1.37 s", "2.73 s",
  477. "5.46 s", "10.9 s", "21.8 s", "43.7 s",
  478. };
  479. static const char *const atk_lim[11] = {
  480. "0.25 ms", "0.5 ms", "1 ms", "2 ms",
  481. "4 ms", "8 ms", "16 ms", "32 ms",
  482. "64 ms", "128 ms", "256 ms",
  483. };
  484. static const char *const atk_alc[11] = {
  485. "8.40 ms", "16.8 ms", "33.6 ms", "67.2 ms",
  486. "134 ms", "269 ms", "538 ms", "1.08 s",
  487. "2.15 s", "4.3 s", "8.6 s",
  488. };
  489. static const char *const dcy_lim[11] = {
  490. "1.2 ms", "2.4 ms", "4.8 ms", "9.6 ms",
  491. "19.2 ms", "38.4 ms", "76.8 ms", "154 ms",
  492. "307 ms", "614 ms", "1.23 s",
  493. };
  494. static const char *const dcy_alc[11] = {
  495. "33.5 ms", "67.0 ms", "134 ms", "268 ms",
  496. "536 ms", "1.07 s", "2.14 s", "4.29 s",
  497. "8.58 s", "17.2 s", "34.3 s",
  498. };
  499. static const char *const tranwin[8] = {
  500. "0 us", "62.5 us", "125 us", "250 us",
  501. "500 us", "1 ms", "2 ms", "4 ms",
  502. };
  503. u8 max;
  504. const char *const *names;
  505. max = (ctl->private_value >> 12) & 0xf;
  506. switch ((ctl->private_value >> 24) & 0x1f) {
  507. case WM8776_ALCCTRL2:
  508. names = hld;
  509. break;
  510. case WM8776_ALCCTRL3:
  511. if (((ctl->private_value >> 20) & 0xf) == 0) {
  512. if (ctl->private_value & LC_CONTROL_LIMITER)
  513. names = atk_lim;
  514. else
  515. names = atk_alc;
  516. } else {
  517. if (ctl->private_value & LC_CONTROL_LIMITER)
  518. names = dcy_lim;
  519. else
  520. names = dcy_alc;
  521. }
  522. break;
  523. case WM8776_LIMITER:
  524. names = tranwin;
  525. break;
  526. default:
  527. return -ENXIO;
  528. }
  529. return snd_ctl_enum_info(info, 1, max + 1, names);
  530. }
  531. static int wm8776_field_volume_info(struct snd_kcontrol *ctl,
  532. struct snd_ctl_elem_info *info)
  533. {
  534. info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  535. info->count = 1;
  536. info->value.integer.min = (ctl->private_value >> 8) & 0xf;
  537. info->value.integer.max = (ctl->private_value >> 12) & 0xf;
  538. return 0;
  539. }
  540. static void wm8776_field_set_from_ctl(struct snd_kcontrol *ctl)
  541. {
  542. struct oxygen *chip = ctl->private_data;
  543. struct xonar_wm87x6 *data = chip->model_data;
  544. unsigned int value, reg_index, mode;
  545. u8 min, max, shift;
  546. u16 mask, reg_value;
  547. bool invert;
  548. if ((data->wm8776_regs[WM8776_ALCCTRL1] & WM8776_LCSEL_MASK) ==
  549. WM8776_LCSEL_LIMITER)
  550. mode = LC_CONTROL_LIMITER;
  551. else
  552. mode = LC_CONTROL_ALC;
  553. if (!(ctl->private_value & mode))
  554. return;
  555. value = ctl->private_value & 0xf;
  556. min = (ctl->private_value >> 8) & 0xf;
  557. max = (ctl->private_value >> 12) & 0xf;
  558. mask = (ctl->private_value >> 16) & 0xf;
  559. shift = (ctl->private_value >> 20) & 0xf;
  560. reg_index = (ctl->private_value >> 24) & 0x1f;
  561. invert = (ctl->private_value >> 29) & 0x1;
  562. if (invert)
  563. value = max - (value - min);
  564. reg_value = data->wm8776_regs[reg_index];
  565. reg_value &= ~(mask << shift);
  566. reg_value |= value << shift;
  567. wm8776_write_cached(chip, reg_index, reg_value);
  568. }
  569. static int wm8776_field_set(struct snd_kcontrol *ctl, unsigned int value)
  570. {
  571. struct oxygen *chip = ctl->private_data;
  572. u8 min, max;
  573. int changed;
  574. min = (ctl->private_value >> 8) & 0xf;
  575. max = (ctl->private_value >> 12) & 0xf;
  576. if (value < min || value > max)
  577. return -EINVAL;
  578. mutex_lock(&chip->mutex);
  579. changed = value != (ctl->private_value & 0xf);
  580. if (changed) {
  581. ctl->private_value = (ctl->private_value & ~0xf) | value;
  582. wm8776_field_set_from_ctl(ctl);
  583. }
  584. mutex_unlock(&chip->mutex);
  585. return changed;
  586. }
  587. static int wm8776_field_enum_get(struct snd_kcontrol *ctl,
  588. struct snd_ctl_elem_value *value)
  589. {
  590. value->value.enumerated.item[0] = ctl->private_value & 0xf;
  591. return 0;
  592. }
  593. static int wm8776_field_volume_get(struct snd_kcontrol *ctl,
  594. struct snd_ctl_elem_value *value)
  595. {
  596. value->value.integer.value[0] = ctl->private_value & 0xf;
  597. return 0;
  598. }
  599. static int wm8776_field_enum_put(struct snd_kcontrol *ctl,
  600. struct snd_ctl_elem_value *value)
  601. {
  602. return wm8776_field_set(ctl, value->value.enumerated.item[0]);
  603. }
  604. static int wm8776_field_volume_put(struct snd_kcontrol *ctl,
  605. struct snd_ctl_elem_value *value)
  606. {
  607. return wm8776_field_set(ctl, value->value.integer.value[0]);
  608. }
  609. static int wm8776_hp_vol_info(struct snd_kcontrol *ctl,
  610. struct snd_ctl_elem_info *info)
  611. {
  612. info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  613. info->count = 2;
  614. info->value.integer.min = 0x79 - 60;
  615. info->value.integer.max = 0x7f;
  616. return 0;
  617. }
  618. static int wm8776_hp_vol_get(struct snd_kcontrol *ctl,
  619. struct snd_ctl_elem_value *value)
  620. {
  621. struct oxygen *chip = ctl->private_data;
  622. struct xonar_wm87x6 *data = chip->model_data;
  623. mutex_lock(&chip->mutex);
  624. value->value.integer.value[0] =
  625. data->wm8776_regs[WM8776_HPLVOL] & WM8776_HPATT_MASK;
  626. value->value.integer.value[1] =
  627. data->wm8776_regs[WM8776_HPRVOL] & WM8776_HPATT_MASK;
  628. mutex_unlock(&chip->mutex);
  629. return 0;
  630. }
  631. static int wm8776_hp_vol_put(struct snd_kcontrol *ctl,
  632. struct snd_ctl_elem_value *value)
  633. {
  634. struct oxygen *chip = ctl->private_data;
  635. struct xonar_wm87x6 *data = chip->model_data;
  636. u8 to_update;
  637. mutex_lock(&chip->mutex);
  638. to_update = (value->value.integer.value[0] !=
  639. (data->wm8776_regs[WM8776_HPLVOL] & WM8776_HPATT_MASK))
  640. << 0;
  641. to_update |= (value->value.integer.value[1] !=
  642. (data->wm8776_regs[WM8776_HPRVOL] & WM8776_HPATT_MASK))
  643. << 1;
  644. if (value->value.integer.value[0] == value->value.integer.value[1]) {
  645. if (to_update) {
  646. wm8776_write(chip, WM8776_HPMASTER,
  647. value->value.integer.value[0] |
  648. WM8776_HPZCEN | WM8776_UPDATE);
  649. data->wm8776_regs[WM8776_HPLVOL] =
  650. value->value.integer.value[0] | WM8776_HPZCEN;
  651. data->wm8776_regs[WM8776_HPRVOL] =
  652. value->value.integer.value[0] | WM8776_HPZCEN;
  653. }
  654. } else {
  655. if (to_update & 1)
  656. wm8776_write(chip, WM8776_HPLVOL,
  657. value->value.integer.value[0] |
  658. WM8776_HPZCEN |
  659. ((to_update & 2) ? 0 : WM8776_UPDATE));
  660. if (to_update & 2)
  661. wm8776_write(chip, WM8776_HPRVOL,
  662. value->value.integer.value[1] |
  663. WM8776_HPZCEN | WM8776_UPDATE);
  664. }
  665. mutex_unlock(&chip->mutex);
  666. return to_update != 0;
  667. }
  668. static int wm8776_input_mux_get(struct snd_kcontrol *ctl,
  669. struct snd_ctl_elem_value *value)
  670. {
  671. struct oxygen *chip = ctl->private_data;
  672. struct xonar_wm87x6 *data = chip->model_data;
  673. unsigned int mux_bit = ctl->private_value;
  674. value->value.integer.value[0] =
  675. !!(data->wm8776_regs[WM8776_ADCMUX] & mux_bit);
  676. return 0;
  677. }
  678. static int wm8776_input_mux_put(struct snd_kcontrol *ctl,
  679. struct snd_ctl_elem_value *value)
  680. {
  681. struct oxygen *chip = ctl->private_data;
  682. struct xonar_wm87x6 *data = chip->model_data;
  683. struct snd_kcontrol *other_ctl;
  684. unsigned int mux_bit = ctl->private_value;
  685. u16 reg;
  686. int changed;
  687. mutex_lock(&chip->mutex);
  688. reg = data->wm8776_regs[WM8776_ADCMUX];
  689. if (value->value.integer.value[0]) {
  690. reg |= mux_bit;
  691. /* line-in and mic-in are exclusive */
  692. mux_bit ^= 3;
  693. if (reg & mux_bit) {
  694. reg &= ~mux_bit;
  695. if (mux_bit == 1)
  696. other_ctl = data->line_adcmux_control;
  697. else
  698. other_ctl = data->mic_adcmux_control;
  699. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
  700. &other_ctl->id);
  701. }
  702. } else
  703. reg &= ~mux_bit;
  704. changed = reg != data->wm8776_regs[WM8776_ADCMUX];
  705. if (changed) {
  706. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  707. reg & 1 ? GPIO_DS_INPUT_ROUTE : 0,
  708. GPIO_DS_INPUT_ROUTE);
  709. wm8776_write(chip, WM8776_ADCMUX, reg);
  710. }
  711. mutex_unlock(&chip->mutex);
  712. return changed;
  713. }
  714. static int wm8776_input_vol_info(struct snd_kcontrol *ctl,
  715. struct snd_ctl_elem_info *info)
  716. {
  717. info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  718. info->count = 2;
  719. info->value.integer.min = 0xa5;
  720. info->value.integer.max = 0xff;
  721. return 0;
  722. }
  723. static int wm8776_input_vol_get(struct snd_kcontrol *ctl,
  724. struct snd_ctl_elem_value *value)
  725. {
  726. struct oxygen *chip = ctl->private_data;
  727. struct xonar_wm87x6 *data = chip->model_data;
  728. mutex_lock(&chip->mutex);
  729. value->value.integer.value[0] =
  730. data->wm8776_regs[WM8776_ADCLVOL] & WM8776_AGMASK;
  731. value->value.integer.value[1] =
  732. data->wm8776_regs[WM8776_ADCRVOL] & WM8776_AGMASK;
  733. mutex_unlock(&chip->mutex);
  734. return 0;
  735. }
  736. static int wm8776_input_vol_put(struct snd_kcontrol *ctl,
  737. struct snd_ctl_elem_value *value)
  738. {
  739. struct oxygen *chip = ctl->private_data;
  740. struct xonar_wm87x6 *data = chip->model_data;
  741. int changed = 0;
  742. mutex_lock(&chip->mutex);
  743. changed = (value->value.integer.value[0] !=
  744. (data->wm8776_regs[WM8776_ADCLVOL] & WM8776_AGMASK)) ||
  745. (value->value.integer.value[1] !=
  746. (data->wm8776_regs[WM8776_ADCRVOL] & WM8776_AGMASK));
  747. wm8776_write_cached(chip, WM8776_ADCLVOL,
  748. value->value.integer.value[0] | WM8776_ZCA);
  749. wm8776_write_cached(chip, WM8776_ADCRVOL,
  750. value->value.integer.value[1] | WM8776_ZCA);
  751. mutex_unlock(&chip->mutex);
  752. return changed;
  753. }
  754. static int wm8776_level_control_info(struct snd_kcontrol *ctl,
  755. struct snd_ctl_elem_info *info)
  756. {
  757. static const char *const names[3] = {
  758. "None", "Peak Limiter", "Automatic Level Control"
  759. };
  760. return snd_ctl_enum_info(info, 1, 3, names);
  761. }
  762. static int wm8776_level_control_get(struct snd_kcontrol *ctl,
  763. struct snd_ctl_elem_value *value)
  764. {
  765. struct oxygen *chip = ctl->private_data;
  766. struct xonar_wm87x6 *data = chip->model_data;
  767. if (!(data->wm8776_regs[WM8776_ALCCTRL2] & WM8776_LCEN))
  768. value->value.enumerated.item[0] = 0;
  769. else if ((data->wm8776_regs[WM8776_ALCCTRL1] & WM8776_LCSEL_MASK) ==
  770. WM8776_LCSEL_LIMITER)
  771. value->value.enumerated.item[0] = 1;
  772. else
  773. value->value.enumerated.item[0] = 2;
  774. return 0;
  775. }
  776. static void activate_control(struct oxygen *chip,
  777. struct snd_kcontrol *ctl, unsigned int mode)
  778. {
  779. unsigned int access;
  780. if (ctl->private_value & mode)
  781. access = 0;
  782. else
  783. access = SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  784. if ((ctl->vd[0].access & SNDRV_CTL_ELEM_ACCESS_INACTIVE) != access) {
  785. ctl->vd[0].access ^= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  786. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
  787. }
  788. }
  789. static int wm8776_level_control_put(struct snd_kcontrol *ctl,
  790. struct snd_ctl_elem_value *value)
  791. {
  792. struct oxygen *chip = ctl->private_data;
  793. struct xonar_wm87x6 *data = chip->model_data;
  794. unsigned int mode = 0, i;
  795. u16 ctrl1, ctrl2;
  796. int changed;
  797. if (value->value.enumerated.item[0] >= 3)
  798. return -EINVAL;
  799. mutex_lock(&chip->mutex);
  800. changed = value->value.enumerated.item[0] != ctl->private_value;
  801. if (changed) {
  802. ctl->private_value = value->value.enumerated.item[0];
  803. ctrl1 = data->wm8776_regs[WM8776_ALCCTRL1];
  804. ctrl2 = data->wm8776_regs[WM8776_ALCCTRL2];
  805. switch (value->value.enumerated.item[0]) {
  806. default:
  807. wm8776_write_cached(chip, WM8776_ALCCTRL2,
  808. ctrl2 & ~WM8776_LCEN);
  809. break;
  810. case 1:
  811. wm8776_write_cached(chip, WM8776_ALCCTRL1,
  812. (ctrl1 & ~WM8776_LCSEL_MASK) |
  813. WM8776_LCSEL_LIMITER);
  814. wm8776_write_cached(chip, WM8776_ALCCTRL2,
  815. ctrl2 | WM8776_LCEN);
  816. mode = LC_CONTROL_LIMITER;
  817. break;
  818. case 2:
  819. wm8776_write_cached(chip, WM8776_ALCCTRL1,
  820. (ctrl1 & ~WM8776_LCSEL_MASK) |
  821. WM8776_LCSEL_ALC_STEREO);
  822. wm8776_write_cached(chip, WM8776_ALCCTRL2,
  823. ctrl2 | WM8776_LCEN);
  824. mode = LC_CONTROL_ALC;
  825. break;
  826. }
  827. for (i = 0; i < ARRAY_SIZE(data->lc_controls); ++i)
  828. activate_control(chip, data->lc_controls[i], mode);
  829. }
  830. mutex_unlock(&chip->mutex);
  831. return changed;
  832. }
  833. static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
  834. {
  835. static const char *const names[2] = {
  836. "None", "High-pass Filter"
  837. };
  838. return snd_ctl_enum_info(info, 1, 2, names);
  839. }
  840. static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  841. {
  842. struct oxygen *chip = ctl->private_data;
  843. struct xonar_wm87x6 *data = chip->model_data;
  844. value->value.enumerated.item[0] =
  845. !(data->wm8776_regs[WM8776_ADCIFCTRL] & WM8776_ADCHPD);
  846. return 0;
  847. }
  848. static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  849. {
  850. struct oxygen *chip = ctl->private_data;
  851. struct xonar_wm87x6 *data = chip->model_data;
  852. unsigned int reg;
  853. int changed;
  854. mutex_lock(&chip->mutex);
  855. reg = data->wm8776_regs[WM8776_ADCIFCTRL] & ~WM8776_ADCHPD;
  856. if (!value->value.enumerated.item[0])
  857. reg |= WM8776_ADCHPD;
  858. changed = reg != data->wm8776_regs[WM8776_ADCIFCTRL];
  859. if (changed)
  860. wm8776_write(chip, WM8776_ADCIFCTRL, reg);
  861. mutex_unlock(&chip->mutex);
  862. return changed;
  863. }
  864. #define WM8776_BIT_SWITCH(xname, reg, bit, invert, flags) { \
  865. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  866. .name = xname, \
  867. .info = snd_ctl_boolean_mono_info, \
  868. .get = wm8776_bit_switch_get, \
  869. .put = wm8776_bit_switch_put, \
  870. .private_value = ((reg) << 16) | (bit) | ((invert) << 24) | (flags), \
  871. }
  872. #define _WM8776_FIELD_CTL(xname, reg, shift, initval, min, max, mask, flags) \
  873. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  874. .name = xname, \
  875. .private_value = (initval) | ((min) << 8) | ((max) << 12) | \
  876. ((mask) << 16) | ((shift) << 20) | ((reg) << 24) | (flags)
  877. #define WM8776_FIELD_CTL_ENUM(xname, reg, shift, init, min, max, mask, flags) {\
  878. _WM8776_FIELD_CTL(xname " Capture Enum", \
  879. reg, shift, init, min, max, mask, flags), \
  880. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
  881. SNDRV_CTL_ELEM_ACCESS_INACTIVE, \
  882. .info = wm8776_field_enum_info, \
  883. .get = wm8776_field_enum_get, \
  884. .put = wm8776_field_enum_put, \
  885. }
  886. #define WM8776_FIELD_CTL_VOLUME(a, b, c, d, e, f, g, h, tlv_p) { \
  887. _WM8776_FIELD_CTL(a " Capture Volume", b, c, d, e, f, g, h), \
  888. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
  889. SNDRV_CTL_ELEM_ACCESS_INACTIVE | \
  890. SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  891. .info = wm8776_field_volume_info, \
  892. .get = wm8776_field_volume_get, \
  893. .put = wm8776_field_volume_put, \
  894. .tlv = { .p = tlv_p }, \
  895. }
  896. static const DECLARE_TLV_DB_SCALE(wm87x6_dac_db_scale, -6000, 50, 0);
  897. static const DECLARE_TLV_DB_SCALE(wm8776_adc_db_scale, -2100, 50, 0);
  898. static const DECLARE_TLV_DB_SCALE(wm8776_hp_db_scale, -6000, 100, 0);
  899. static const DECLARE_TLV_DB_SCALE(wm8776_lct_db_scale, -1600, 100, 0);
  900. static const DECLARE_TLV_DB_SCALE(wm8776_maxgain_db_scale, 0, 400, 0);
  901. static const DECLARE_TLV_DB_SCALE(wm8776_ngth_db_scale, -7800, 600, 0);
  902. static const DECLARE_TLV_DB_SCALE(wm8776_maxatten_lim_db_scale, -1200, 100, 0);
  903. static const DECLARE_TLV_DB_SCALE(wm8776_maxatten_alc_db_scale, -2100, 400, 0);
  904. static const struct snd_kcontrol_new ds_controls[] = {
  905. {
  906. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  907. .name = "Headphone Playback Volume",
  908. .info = wm8776_hp_vol_info,
  909. .get = wm8776_hp_vol_get,
  910. .put = wm8776_hp_vol_put,
  911. .tlv = { .p = wm8776_hp_db_scale },
  912. },
  913. WM8776_BIT_SWITCH("Headphone Playback Switch",
  914. WM8776_PWRDOWN, WM8776_HPPD, 1, 0),
  915. {
  916. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  917. .name = "Input Capture Volume",
  918. .info = wm8776_input_vol_info,
  919. .get = wm8776_input_vol_get,
  920. .put = wm8776_input_vol_put,
  921. .tlv = { .p = wm8776_adc_db_scale },
  922. },
  923. {
  924. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  925. .name = "Line Capture Switch",
  926. .info = snd_ctl_boolean_mono_info,
  927. .get = wm8776_input_mux_get,
  928. .put = wm8776_input_mux_put,
  929. .private_value = 1 << 0,
  930. },
  931. {
  932. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  933. .name = "Mic Capture Switch",
  934. .info = snd_ctl_boolean_mono_info,
  935. .get = wm8776_input_mux_get,
  936. .put = wm8776_input_mux_put,
  937. .private_value = 1 << 1,
  938. },
  939. WM8776_BIT_SWITCH("Front Mic Capture Switch",
  940. WM8776_ADCMUX, 1 << 2, 0, 0),
  941. WM8776_BIT_SWITCH("Aux Capture Switch",
  942. WM8776_ADCMUX, 1 << 3, 0, 0),
  943. {
  944. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  945. .name = "ADC Filter Capture Enum",
  946. .info = hpf_info,
  947. .get = hpf_get,
  948. .put = hpf_put,
  949. },
  950. {
  951. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  952. .name = "Level Control Capture Enum",
  953. .info = wm8776_level_control_info,
  954. .get = wm8776_level_control_get,
  955. .put = wm8776_level_control_put,
  956. .private_value = 0,
  957. },
  958. };
  959. static const struct snd_kcontrol_new hdav_slim_controls[] = {
  960. {
  961. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  962. .name = "HDMI Playback Switch",
  963. .info = snd_ctl_boolean_mono_info,
  964. .get = xonar_gpio_bit_switch_get,
  965. .put = xonar_gpio_bit_switch_put,
  966. .private_value = GPIO_SLIM_HDMI_DISABLE | XONAR_GPIO_BIT_INVERT,
  967. },
  968. {
  969. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  970. .name = "Headphone Playback Volume",
  971. .info = wm8776_hp_vol_info,
  972. .get = wm8776_hp_vol_get,
  973. .put = wm8776_hp_vol_put,
  974. .tlv = { .p = wm8776_hp_db_scale },
  975. },
  976. WM8776_BIT_SWITCH("Headphone Playback Switch",
  977. WM8776_PWRDOWN, WM8776_HPPD, 1, 0),
  978. {
  979. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  980. .name = "Input Capture Volume",
  981. .info = wm8776_input_vol_info,
  982. .get = wm8776_input_vol_get,
  983. .put = wm8776_input_vol_put,
  984. .tlv = { .p = wm8776_adc_db_scale },
  985. },
  986. WM8776_BIT_SWITCH("Mic Capture Switch",
  987. WM8776_ADCMUX, 1 << 0, 0, 0),
  988. WM8776_BIT_SWITCH("Aux Capture Switch",
  989. WM8776_ADCMUX, 1 << 1, 0, 0),
  990. {
  991. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  992. .name = "ADC Filter Capture Enum",
  993. .info = hpf_info,
  994. .get = hpf_get,
  995. .put = hpf_put,
  996. },
  997. {
  998. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  999. .name = "Level Control Capture Enum",
  1000. .info = wm8776_level_control_info,
  1001. .get = wm8776_level_control_get,
  1002. .put = wm8776_level_control_put,
  1003. .private_value = 0,
  1004. },
  1005. };
  1006. static const struct snd_kcontrol_new lc_controls[] = {
  1007. WM8776_FIELD_CTL_VOLUME("Limiter Threshold",
  1008. WM8776_ALCCTRL1, 0, 11, 0, 15, 0xf,
  1009. LC_CONTROL_LIMITER, wm8776_lct_db_scale),
  1010. WM8776_FIELD_CTL_ENUM("Limiter Attack Time",
  1011. WM8776_ALCCTRL3, 0, 2, 0, 10, 0xf,
  1012. LC_CONTROL_LIMITER),
  1013. WM8776_FIELD_CTL_ENUM("Limiter Decay Time",
  1014. WM8776_ALCCTRL3, 4, 3, 0, 10, 0xf,
  1015. LC_CONTROL_LIMITER),
  1016. WM8776_FIELD_CTL_ENUM("Limiter Transient Window",
  1017. WM8776_LIMITER, 4, 2, 0, 7, 0x7,
  1018. LC_CONTROL_LIMITER),
  1019. WM8776_FIELD_CTL_VOLUME("Limiter Maximum Attenuation",
  1020. WM8776_LIMITER, 0, 6, 3, 12, 0xf,
  1021. LC_CONTROL_LIMITER,
  1022. wm8776_maxatten_lim_db_scale),
  1023. WM8776_FIELD_CTL_VOLUME("ALC Target Level",
  1024. WM8776_ALCCTRL1, 0, 11, 0, 15, 0xf,
  1025. LC_CONTROL_ALC, wm8776_lct_db_scale),
  1026. WM8776_FIELD_CTL_ENUM("ALC Attack Time",
  1027. WM8776_ALCCTRL3, 0, 2, 0, 10, 0xf,
  1028. LC_CONTROL_ALC),
  1029. WM8776_FIELD_CTL_ENUM("ALC Decay Time",
  1030. WM8776_ALCCTRL3, 4, 3, 0, 10, 0xf,
  1031. LC_CONTROL_ALC),
  1032. WM8776_FIELD_CTL_VOLUME("ALC Maximum Gain",
  1033. WM8776_ALCCTRL1, 4, 7, 1, 7, 0x7,
  1034. LC_CONTROL_ALC, wm8776_maxgain_db_scale),
  1035. WM8776_FIELD_CTL_VOLUME("ALC Maximum Attenuation",
  1036. WM8776_LIMITER, 0, 10, 10, 15, 0xf,
  1037. LC_CONTROL_ALC, wm8776_maxatten_alc_db_scale),
  1038. WM8776_FIELD_CTL_ENUM("ALC Hold Time",
  1039. WM8776_ALCCTRL2, 0, 0, 0, 15, 0xf,
  1040. LC_CONTROL_ALC),
  1041. WM8776_BIT_SWITCH("Noise Gate Capture Switch",
  1042. WM8776_NOISEGATE, WM8776_NGAT, 0,
  1043. LC_CONTROL_ALC),
  1044. WM8776_FIELD_CTL_VOLUME("Noise Gate Threshold",
  1045. WM8776_NOISEGATE, 2, 0, 0, 7, 0x7,
  1046. LC_CONTROL_ALC, wm8776_ngth_db_scale),
  1047. };
  1048. static int add_lc_controls(struct oxygen *chip)
  1049. {
  1050. struct xonar_wm87x6 *data = chip->model_data;
  1051. unsigned int i;
  1052. struct snd_kcontrol *ctl;
  1053. int err;
  1054. BUILD_BUG_ON(ARRAY_SIZE(lc_controls) != ARRAY_SIZE(data->lc_controls));
  1055. for (i = 0; i < ARRAY_SIZE(lc_controls); ++i) {
  1056. ctl = snd_ctl_new1(&lc_controls[i], chip);
  1057. if (!ctl)
  1058. return -ENOMEM;
  1059. err = snd_ctl_add(chip->card, ctl);
  1060. if (err < 0)
  1061. return err;
  1062. data->lc_controls[i] = ctl;
  1063. }
  1064. return 0;
  1065. }
  1066. static int xonar_ds_mixer_init(struct oxygen *chip)
  1067. {
  1068. struct xonar_wm87x6 *data = chip->model_data;
  1069. unsigned int i;
  1070. struct snd_kcontrol *ctl;
  1071. int err;
  1072. for (i = 0; i < ARRAY_SIZE(ds_controls); ++i) {
  1073. ctl = snd_ctl_new1(&ds_controls[i], chip);
  1074. if (!ctl)
  1075. return -ENOMEM;
  1076. err = snd_ctl_add(chip->card, ctl);
  1077. if (err < 0)
  1078. return err;
  1079. if (!strcmp(ctl->id.name, "Line Capture Switch"))
  1080. data->line_adcmux_control = ctl;
  1081. else if (!strcmp(ctl->id.name, "Mic Capture Switch"))
  1082. data->mic_adcmux_control = ctl;
  1083. }
  1084. if (!data->line_adcmux_control || !data->mic_adcmux_control)
  1085. return -ENXIO;
  1086. return add_lc_controls(chip);
  1087. }
  1088. static int xonar_hdav_slim_mixer_init(struct oxygen *chip)
  1089. {
  1090. unsigned int i;
  1091. struct snd_kcontrol *ctl;
  1092. int err;
  1093. for (i = 0; i < ARRAY_SIZE(hdav_slim_controls); ++i) {
  1094. ctl = snd_ctl_new1(&hdav_slim_controls[i], chip);
  1095. if (!ctl)
  1096. return -ENOMEM;
  1097. err = snd_ctl_add(chip->card, ctl);
  1098. if (err < 0)
  1099. return err;
  1100. }
  1101. return add_lc_controls(chip);
  1102. }
  1103. static void dump_wm8776_registers(struct oxygen *chip,
  1104. struct snd_info_buffer *buffer)
  1105. {
  1106. struct xonar_wm87x6 *data = chip->model_data;
  1107. unsigned int i;
  1108. snd_iprintf(buffer, "\nWM8776:\n00:");
  1109. for (i = 0; i < 0x10; ++i)
  1110. snd_iprintf(buffer, " %03x", data->wm8776_regs[i]);
  1111. snd_iprintf(buffer, "\n10:");
  1112. for (i = 0x10; i < 0x17; ++i)
  1113. snd_iprintf(buffer, " %03x", data->wm8776_regs[i]);
  1114. snd_iprintf(buffer, "\n");
  1115. }
  1116. static void dump_wm87x6_registers(struct oxygen *chip,
  1117. struct snd_info_buffer *buffer)
  1118. {
  1119. struct xonar_wm87x6 *data = chip->model_data;
  1120. unsigned int i;
  1121. dump_wm8776_registers(chip, buffer);
  1122. snd_iprintf(buffer, "\nWM8766:\n00:");
  1123. for (i = 0; i < 0x10; ++i)
  1124. snd_iprintf(buffer, " %03x", data->wm8766_regs[i]);
  1125. snd_iprintf(buffer, "\n");
  1126. }
  1127. static const struct oxygen_model model_xonar_ds = {
  1128. .longname = "Asus Virtuoso 66",
  1129. .chip = "AV200",
  1130. .init = xonar_ds_init,
  1131. .mixer_init = xonar_ds_mixer_init,
  1132. .cleanup = xonar_ds_cleanup,
  1133. .suspend = xonar_ds_suspend,
  1134. .resume = xonar_ds_resume,
  1135. .pcm_hardware_filter = wm8776_adc_hardware_filter,
  1136. .set_dac_params = set_wm87x6_dac_params,
  1137. .set_adc_params = set_wm8776_adc_params,
  1138. .update_dac_volume = update_wm87x6_volume,
  1139. .update_dac_mute = update_wm87x6_mute,
  1140. .update_center_lfe_mix = update_wm8766_center_lfe_mix,
  1141. .gpio_changed = xonar_ds_gpio_changed,
  1142. .dump_registers = dump_wm87x6_registers,
  1143. .dac_tlv = wm87x6_dac_db_scale,
  1144. .model_data_size = sizeof(struct xonar_wm87x6),
  1145. .device_config = PLAYBACK_0_TO_I2S |
  1146. PLAYBACK_1_TO_SPDIF |
  1147. CAPTURE_0_FROM_I2S_1 |
  1148. CAPTURE_1_FROM_SPDIF,
  1149. .dac_channels_pcm = 8,
  1150. .dac_channels_mixer = 8,
  1151. .dac_volume_min = 255 - 2*60,
  1152. .dac_volume_max = 255,
  1153. .function_flags = OXYGEN_FUNCTION_SPI,
  1154. .dac_mclks = OXYGEN_MCLKS(256, 256, 128),
  1155. .adc_mclks = OXYGEN_MCLKS(256, 256, 128),
  1156. .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  1157. .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  1158. };
  1159. static const struct oxygen_model model_xonar_hdav_slim = {
  1160. .shortname = "Xonar HDAV1.3 Slim",
  1161. .longname = "Asus Virtuoso 200",
  1162. .chip = "AV200",
  1163. .init = xonar_hdav_slim_init,
  1164. .mixer_init = xonar_hdav_slim_mixer_init,
  1165. .cleanup = xonar_hdav_slim_cleanup,
  1166. .suspend = xonar_hdav_slim_suspend,
  1167. .resume = xonar_hdav_slim_resume,
  1168. .pcm_hardware_filter = xonar_hdav_slim_hardware_filter,
  1169. .set_dac_params = set_hdav_slim_dac_params,
  1170. .set_adc_params = set_wm8776_adc_params,
  1171. .update_dac_volume = update_wm8776_volume,
  1172. .update_dac_mute = update_wm8776_mute,
  1173. .uart_input = xonar_hdmi_uart_input,
  1174. .dump_registers = dump_wm8776_registers,
  1175. .dac_tlv = wm87x6_dac_db_scale,
  1176. .model_data_size = sizeof(struct xonar_wm87x6),
  1177. .device_config = PLAYBACK_0_TO_I2S |
  1178. PLAYBACK_1_TO_SPDIF |
  1179. CAPTURE_0_FROM_I2S_1 |
  1180. CAPTURE_1_FROM_SPDIF,
  1181. .dac_channels_pcm = 8,
  1182. .dac_channels_mixer = 2,
  1183. .dac_volume_min = 255 - 2*60,
  1184. .dac_volume_max = 255,
  1185. .function_flags = OXYGEN_FUNCTION_2WIRE,
  1186. .dac_mclks = OXYGEN_MCLKS(256, 256, 128),
  1187. .adc_mclks = OXYGEN_MCLKS(256, 256, 128),
  1188. .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  1189. .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  1190. };
  1191. int get_xonar_wm87x6_model(struct oxygen *chip,
  1192. const struct pci_device_id *id)
  1193. {
  1194. switch (id->subdevice) {
  1195. case 0x838e:
  1196. chip->model = model_xonar_ds;
  1197. chip->model.shortname = "Xonar DS";
  1198. break;
  1199. case 0x8522:
  1200. chip->model = model_xonar_ds;
  1201. chip->model.shortname = "Xonar DSX";
  1202. break;
  1203. case 0x835e:
  1204. chip->model = model_xonar_hdav_slim;
  1205. break;
  1206. default:
  1207. return -EINVAL;
  1208. }
  1209. return 0;
  1210. }