axi-i2s.c 6.5 KB

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  1. /*
  2. * Copyright (C) 2012-2013, Analog Devices Inc.
  3. * Author: Lars-Peter Clausen <lars@metafoo.de>
  4. *
  5. * Licensed under the GPL-2.
  6. */
  7. #include <linux/clk.h>
  8. #include <linux/init.h>
  9. #include <linux/kernel.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/regmap.h>
  14. #include <linux/slab.h>
  15. #include <sound/core.h>
  16. #include <sound/pcm.h>
  17. #include <sound/pcm_params.h>
  18. #include <sound/soc.h>
  19. #include <sound/dmaengine_pcm.h>
  20. #define AXI_I2S_REG_RESET 0x00
  21. #define AXI_I2S_REG_CTRL 0x04
  22. #define AXI_I2S_REG_CLK_CTRL 0x08
  23. #define AXI_I2S_REG_STATUS 0x10
  24. #define AXI_I2S_REG_RX_FIFO 0x28
  25. #define AXI_I2S_REG_TX_FIFO 0x2C
  26. #define AXI_I2S_RESET_GLOBAL BIT(0)
  27. #define AXI_I2S_RESET_TX_FIFO BIT(1)
  28. #define AXI_I2S_RESET_RX_FIFO BIT(2)
  29. #define AXI_I2S_CTRL_TX_EN BIT(0)
  30. #define AXI_I2S_CTRL_RX_EN BIT(1)
  31. /* The frame size is configurable, but for now we always set it 64 bit */
  32. #define AXI_I2S_BITS_PER_FRAME 64
  33. struct axi_i2s {
  34. struct regmap *regmap;
  35. struct clk *clk;
  36. struct clk *clk_ref;
  37. struct snd_soc_dai_driver dai_driver;
  38. struct snd_dmaengine_dai_dma_data capture_dma_data;
  39. struct snd_dmaengine_dai_dma_data playback_dma_data;
  40. struct snd_ratnum ratnum;
  41. struct snd_pcm_hw_constraint_ratnums rate_constraints;
  42. };
  43. static int axi_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
  44. struct snd_soc_dai *dai)
  45. {
  46. struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai);
  47. unsigned int mask, val;
  48. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
  49. mask = AXI_I2S_CTRL_RX_EN;
  50. else
  51. mask = AXI_I2S_CTRL_TX_EN;
  52. switch (cmd) {
  53. case SNDRV_PCM_TRIGGER_START:
  54. case SNDRV_PCM_TRIGGER_RESUME:
  55. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  56. val = mask;
  57. break;
  58. case SNDRV_PCM_TRIGGER_STOP:
  59. case SNDRV_PCM_TRIGGER_SUSPEND:
  60. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  61. val = 0;
  62. break;
  63. default:
  64. return -EINVAL;
  65. }
  66. regmap_update_bits(i2s->regmap, AXI_I2S_REG_CTRL, mask, val);
  67. return 0;
  68. }
  69. static int axi_i2s_hw_params(struct snd_pcm_substream *substream,
  70. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  71. {
  72. struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai);
  73. unsigned int bclk_div, word_size;
  74. unsigned int bclk_rate;
  75. bclk_rate = params_rate(params) * AXI_I2S_BITS_PER_FRAME;
  76. word_size = AXI_I2S_BITS_PER_FRAME / 2 - 1;
  77. bclk_div = DIV_ROUND_UP(clk_get_rate(i2s->clk_ref), bclk_rate) / 2 - 1;
  78. regmap_write(i2s->regmap, AXI_I2S_REG_CLK_CTRL, (word_size << 16) |
  79. bclk_div);
  80. return 0;
  81. }
  82. static int axi_i2s_startup(struct snd_pcm_substream *substream,
  83. struct snd_soc_dai *dai)
  84. {
  85. struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai);
  86. uint32_t mask;
  87. int ret;
  88. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
  89. mask = AXI_I2S_RESET_RX_FIFO;
  90. else
  91. mask = AXI_I2S_RESET_TX_FIFO;
  92. regmap_write(i2s->regmap, AXI_I2S_REG_RESET, mask);
  93. ret = snd_pcm_hw_constraint_ratnums(substream->runtime, 0,
  94. SNDRV_PCM_HW_PARAM_RATE,
  95. &i2s->rate_constraints);
  96. if (ret)
  97. return ret;
  98. return clk_prepare_enable(i2s->clk_ref);
  99. }
  100. static void axi_i2s_shutdown(struct snd_pcm_substream *substream,
  101. struct snd_soc_dai *dai)
  102. {
  103. struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai);
  104. clk_disable_unprepare(i2s->clk_ref);
  105. }
  106. static int axi_i2s_dai_probe(struct snd_soc_dai *dai)
  107. {
  108. struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai);
  109. snd_soc_dai_init_dma_data(dai, &i2s->playback_dma_data,
  110. &i2s->capture_dma_data);
  111. return 0;
  112. }
  113. static const struct snd_soc_dai_ops axi_i2s_dai_ops = {
  114. .startup = axi_i2s_startup,
  115. .shutdown = axi_i2s_shutdown,
  116. .trigger = axi_i2s_trigger,
  117. .hw_params = axi_i2s_hw_params,
  118. };
  119. static struct snd_soc_dai_driver axi_i2s_dai = {
  120. .probe = axi_i2s_dai_probe,
  121. .playback = {
  122. .channels_min = 2,
  123. .channels_max = 2,
  124. .rates = SNDRV_PCM_RATE_KNOT,
  125. .formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_U32_LE,
  126. },
  127. .capture = {
  128. .channels_min = 2,
  129. .channels_max = 2,
  130. .rates = SNDRV_PCM_RATE_KNOT,
  131. .formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_U32_LE,
  132. },
  133. .ops = &axi_i2s_dai_ops,
  134. .symmetric_rates = 1,
  135. };
  136. static const struct snd_soc_component_driver axi_i2s_component = {
  137. .name = "axi-i2s",
  138. };
  139. static const struct regmap_config axi_i2s_regmap_config = {
  140. .reg_bits = 32,
  141. .reg_stride = 4,
  142. .val_bits = 32,
  143. .max_register = AXI_I2S_REG_STATUS,
  144. };
  145. static int axi_i2s_probe(struct platform_device *pdev)
  146. {
  147. struct resource *res;
  148. struct axi_i2s *i2s;
  149. void __iomem *base;
  150. int ret;
  151. i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL);
  152. if (!i2s)
  153. return -ENOMEM;
  154. platform_set_drvdata(pdev, i2s);
  155. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  156. base = devm_ioremap_resource(&pdev->dev, res);
  157. if (IS_ERR(base))
  158. return PTR_ERR(base);
  159. i2s->regmap = devm_regmap_init_mmio(&pdev->dev, base,
  160. &axi_i2s_regmap_config);
  161. if (IS_ERR(i2s->regmap))
  162. return PTR_ERR(i2s->regmap);
  163. i2s->clk = devm_clk_get(&pdev->dev, "axi");
  164. if (IS_ERR(i2s->clk))
  165. return PTR_ERR(i2s->clk);
  166. i2s->clk_ref = devm_clk_get(&pdev->dev, "ref");
  167. if (IS_ERR(i2s->clk_ref))
  168. return PTR_ERR(i2s->clk_ref);
  169. ret = clk_prepare_enable(i2s->clk);
  170. if (ret)
  171. return ret;
  172. i2s->playback_dma_data.addr = res->start + AXI_I2S_REG_TX_FIFO;
  173. i2s->playback_dma_data.addr_width = 4;
  174. i2s->playback_dma_data.maxburst = 1;
  175. i2s->capture_dma_data.addr = res->start + AXI_I2S_REG_RX_FIFO;
  176. i2s->capture_dma_data.addr_width = 4;
  177. i2s->capture_dma_data.maxburst = 1;
  178. i2s->ratnum.num = clk_get_rate(i2s->clk_ref) / 2 / AXI_I2S_BITS_PER_FRAME;
  179. i2s->ratnum.den_step = 1;
  180. i2s->ratnum.den_min = 1;
  181. i2s->ratnum.den_max = 64;
  182. i2s->rate_constraints.rats = &i2s->ratnum;
  183. i2s->rate_constraints.nrats = 1;
  184. regmap_write(i2s->regmap, AXI_I2S_REG_RESET, AXI_I2S_RESET_GLOBAL);
  185. ret = devm_snd_soc_register_component(&pdev->dev, &axi_i2s_component,
  186. &axi_i2s_dai, 1);
  187. if (ret)
  188. goto err_clk_disable;
  189. ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
  190. if (ret)
  191. goto err_clk_disable;
  192. return 0;
  193. err_clk_disable:
  194. clk_disable_unprepare(i2s->clk);
  195. return ret;
  196. }
  197. static int axi_i2s_dev_remove(struct platform_device *pdev)
  198. {
  199. struct axi_i2s *i2s = platform_get_drvdata(pdev);
  200. clk_disable_unprepare(i2s->clk);
  201. return 0;
  202. }
  203. static const struct of_device_id axi_i2s_of_match[] = {
  204. { .compatible = "adi,axi-i2s-1.00.a", },
  205. {},
  206. };
  207. MODULE_DEVICE_TABLE(of, axi_i2s_of_match);
  208. static struct platform_driver axi_i2s_driver = {
  209. .driver = {
  210. .name = "axi-i2s",
  211. .of_match_table = axi_i2s_of_match,
  212. },
  213. .probe = axi_i2s_probe,
  214. .remove = axi_i2s_dev_remove,
  215. };
  216. module_platform_driver(axi_i2s_driver);
  217. MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
  218. MODULE_DESCRIPTION("AXI I2S driver");
  219. MODULE_LICENSE("GPL");