bf5xx-ac97-pcm.c 13 KB

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  1. /*
  2. * File: sound/soc/blackfin/bf5xx-ac97-pcm.c
  3. * Author: Cliff Cai <Cliff.Cai@analog.com>
  4. *
  5. * Created: Tue June 06 2008
  6. * Description: DMA Driver for AC97 sound chip
  7. *
  8. * Modified:
  9. * Copyright 2008 Analog Devices Inc.
  10. *
  11. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2 of the License, or
  16. * (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, see the file COPYING, or write
  25. * to the Free Software Foundation, Inc.,
  26. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  27. */
  28. #include <linux/module.h>
  29. #include <linux/init.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/dma-mapping.h>
  32. #include <linux/gfp.h>
  33. #include <sound/core.h>
  34. #include <sound/pcm.h>
  35. #include <sound/pcm_params.h>
  36. #include <sound/soc.h>
  37. #include <asm/dma.h>
  38. #include "bf5xx-ac97.h"
  39. #include "bf5xx-sport.h"
  40. static unsigned int ac97_chan_mask[] = {
  41. SP_FL, /* Mono */
  42. SP_STEREO, /* Stereo */
  43. SP_2DOT1, /* 2.1*/
  44. SP_QUAD,/*Quadraquic*/
  45. SP_FL | SP_FR | SP_FC | SP_SL | SP_SR,/*5 channels */
  46. SP_5DOT1, /* 5.1 */
  47. };
  48. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  49. static void bf5xx_mmap_copy(struct snd_pcm_substream *substream,
  50. snd_pcm_uframes_t count)
  51. {
  52. struct snd_pcm_runtime *runtime = substream->runtime;
  53. struct sport_device *sport = runtime->private_data;
  54. unsigned int chan_mask = ac97_chan_mask[runtime->channels - 1];
  55. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  56. bf5xx_pcm_to_ac97((struct ac97_frame *)sport->tx_dma_buf +
  57. sport->tx_pos, (__u16 *)runtime->dma_area + sport->tx_pos *
  58. runtime->channels, count, chan_mask);
  59. sport->tx_pos += runtime->period_size;
  60. if (sport->tx_pos >= runtime->buffer_size)
  61. sport->tx_pos %= runtime->buffer_size;
  62. sport->tx_delay_pos = sport->tx_pos;
  63. } else {
  64. bf5xx_ac97_to_pcm((struct ac97_frame *)sport->rx_dma_buf +
  65. sport->rx_pos, (__u16 *)runtime->dma_area + sport->rx_pos *
  66. runtime->channels, count);
  67. sport->rx_pos += runtime->period_size;
  68. if (sport->rx_pos >= runtime->buffer_size)
  69. sport->rx_pos %= runtime->buffer_size;
  70. }
  71. }
  72. #endif
  73. static void bf5xx_dma_irq(void *data)
  74. {
  75. struct snd_pcm_substream *pcm = data;
  76. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  77. struct snd_pcm_runtime *runtime = pcm->runtime;
  78. struct sport_device *sport = runtime->private_data;
  79. bf5xx_mmap_copy(pcm, runtime->period_size);
  80. if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  81. if (sport->once == 0) {
  82. snd_pcm_period_elapsed(pcm);
  83. bf5xx_mmap_copy(pcm, runtime->period_size);
  84. sport->once = 1;
  85. }
  86. }
  87. #endif
  88. snd_pcm_period_elapsed(pcm);
  89. }
  90. /* The memory size for pure pcm data is 128*1024 = 0x20000 bytes.
  91. * The total rx/tx buffer is for ac97 frame to hold all pcm data
  92. * is 0x20000 * sizeof(struct ac97_frame) / 4.
  93. */
  94. static const struct snd_pcm_hardware bf5xx_pcm_hardware = {
  95. .info = SNDRV_PCM_INFO_INTERLEAVED |
  96. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  97. SNDRV_PCM_INFO_MMAP |
  98. SNDRV_PCM_INFO_MMAP_VALID |
  99. #endif
  100. SNDRV_PCM_INFO_BLOCK_TRANSFER,
  101. .period_bytes_min = 32,
  102. .period_bytes_max = 0x10000,
  103. .periods_min = 1,
  104. .periods_max = PAGE_SIZE/32,
  105. .buffer_bytes_max = 0x20000, /* 128 kbytes */
  106. .fifo_size = 16,
  107. };
  108. static int bf5xx_pcm_hw_params(struct snd_pcm_substream *substream,
  109. struct snd_pcm_hw_params *params)
  110. {
  111. size_t size = bf5xx_pcm_hardware.buffer_bytes_max
  112. * sizeof(struct ac97_frame) / 4;
  113. snd_pcm_lib_malloc_pages(substream, size);
  114. return 0;
  115. }
  116. static int bf5xx_pcm_hw_free(struct snd_pcm_substream *substream)
  117. {
  118. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  119. struct snd_pcm_runtime *runtime = substream->runtime;
  120. struct sport_device *sport = runtime->private_data;
  121. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  122. sport->once = 0;
  123. if (runtime->dma_area)
  124. memset(runtime->dma_area, 0, runtime->buffer_size);
  125. memset(sport->tx_dma_buf, 0, runtime->buffer_size *
  126. sizeof(struct ac97_frame));
  127. } else
  128. memset(sport->rx_dma_buf, 0, runtime->buffer_size *
  129. sizeof(struct ac97_frame));
  130. #endif
  131. snd_pcm_lib_free_pages(substream);
  132. return 0;
  133. }
  134. static int bf5xx_pcm_prepare(struct snd_pcm_substream *substream)
  135. {
  136. struct snd_pcm_runtime *runtime = substream->runtime;
  137. struct sport_device *sport = runtime->private_data;
  138. /* An intermediate buffer is introduced for implementing mmap for
  139. * SPORT working in TMD mode(include AC97).
  140. */
  141. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  142. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  143. sport_set_tx_callback(sport, bf5xx_dma_irq, substream);
  144. sport_config_tx_dma(sport, sport->tx_dma_buf, runtime->periods,
  145. runtime->period_size * sizeof(struct ac97_frame));
  146. } else {
  147. sport_set_rx_callback(sport, bf5xx_dma_irq, substream);
  148. sport_config_rx_dma(sport, sport->rx_dma_buf, runtime->periods,
  149. runtime->period_size * sizeof(struct ac97_frame));
  150. }
  151. #else
  152. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  153. sport_set_tx_callback(sport, bf5xx_dma_irq, substream);
  154. sport_config_tx_dma(sport, runtime->dma_area, runtime->periods,
  155. runtime->period_size * sizeof(struct ac97_frame));
  156. } else {
  157. sport_set_rx_callback(sport, bf5xx_dma_irq, substream);
  158. sport_config_rx_dma(sport, runtime->dma_area, runtime->periods,
  159. runtime->period_size * sizeof(struct ac97_frame));
  160. }
  161. #endif
  162. return 0;
  163. }
  164. static int bf5xx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  165. {
  166. struct snd_pcm_runtime *runtime = substream->runtime;
  167. struct sport_device *sport = runtime->private_data;
  168. int ret = 0;
  169. pr_debug("%s enter\n", __func__);
  170. switch (cmd) {
  171. case SNDRV_PCM_TRIGGER_START:
  172. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  173. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  174. bf5xx_mmap_copy(substream, runtime->period_size);
  175. sport->tx_delay_pos = 0;
  176. #endif
  177. sport_tx_start(sport);
  178. } else
  179. sport_rx_start(sport);
  180. break;
  181. case SNDRV_PCM_TRIGGER_STOP:
  182. case SNDRV_PCM_TRIGGER_SUSPEND:
  183. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  184. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  185. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  186. sport->tx_pos = 0;
  187. #endif
  188. sport_tx_stop(sport);
  189. } else {
  190. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  191. sport->rx_pos = 0;
  192. #endif
  193. sport_rx_stop(sport);
  194. }
  195. break;
  196. default:
  197. ret = -EINVAL;
  198. }
  199. return ret;
  200. }
  201. static snd_pcm_uframes_t bf5xx_pcm_pointer(struct snd_pcm_substream *substream)
  202. {
  203. struct snd_pcm_runtime *runtime = substream->runtime;
  204. struct sport_device *sport = runtime->private_data;
  205. unsigned int curr;
  206. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  207. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  208. curr = sport->tx_delay_pos;
  209. else
  210. curr = sport->rx_pos;
  211. #else
  212. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  213. curr = sport_curr_offset_tx(sport) / sizeof(struct ac97_frame);
  214. else
  215. curr = sport_curr_offset_rx(sport) / sizeof(struct ac97_frame);
  216. #endif
  217. return curr;
  218. }
  219. static int bf5xx_pcm_open(struct snd_pcm_substream *substream)
  220. {
  221. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  222. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  223. struct sport_device *sport_handle = snd_soc_dai_get_drvdata(cpu_dai);
  224. struct snd_pcm_runtime *runtime = substream->runtime;
  225. int ret;
  226. pr_debug("%s enter\n", __func__);
  227. snd_soc_set_runtime_hwparams(substream, &bf5xx_pcm_hardware);
  228. ret = snd_pcm_hw_constraint_integer(runtime,
  229. SNDRV_PCM_HW_PARAM_PERIODS);
  230. if (ret < 0)
  231. goto out;
  232. if (sport_handle != NULL)
  233. runtime->private_data = sport_handle;
  234. else {
  235. pr_err("sport_handle is NULL\n");
  236. return -1;
  237. }
  238. return 0;
  239. out:
  240. return ret;
  241. }
  242. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  243. static int bf5xx_pcm_mmap(struct snd_pcm_substream *substream,
  244. struct vm_area_struct *vma)
  245. {
  246. struct snd_pcm_runtime *runtime = substream->runtime;
  247. size_t size = vma->vm_end - vma->vm_start;
  248. vma->vm_start = (unsigned long)runtime->dma_area;
  249. vma->vm_end = vma->vm_start + size;
  250. vma->vm_flags |= VM_SHARED;
  251. return 0 ;
  252. }
  253. #else
  254. static int bf5xx_pcm_copy(struct snd_pcm_substream *substream, int channel,
  255. snd_pcm_uframes_t pos,
  256. void __user *buf, snd_pcm_uframes_t count)
  257. {
  258. struct snd_pcm_runtime *runtime = substream->runtime;
  259. unsigned int chan_mask = ac97_chan_mask[runtime->channels - 1];
  260. pr_debug("%s copy pos:0x%lx count:0x%lx\n",
  261. substream->stream ? "Capture" : "Playback", pos, count);
  262. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  263. bf5xx_pcm_to_ac97((struct ac97_frame *)runtime->dma_area + pos,
  264. (__u16 *)buf, count, chan_mask);
  265. else
  266. bf5xx_ac97_to_pcm((struct ac97_frame *)runtime->dma_area + pos,
  267. (__u16 *)buf, count);
  268. return 0;
  269. }
  270. #endif
  271. static struct snd_pcm_ops bf5xx_pcm_ac97_ops = {
  272. .open = bf5xx_pcm_open,
  273. .ioctl = snd_pcm_lib_ioctl,
  274. .hw_params = bf5xx_pcm_hw_params,
  275. .hw_free = bf5xx_pcm_hw_free,
  276. .prepare = bf5xx_pcm_prepare,
  277. .trigger = bf5xx_pcm_trigger,
  278. .pointer = bf5xx_pcm_pointer,
  279. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  280. .mmap = bf5xx_pcm_mmap,
  281. #else
  282. .copy = bf5xx_pcm_copy,
  283. #endif
  284. };
  285. static int bf5xx_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
  286. {
  287. struct snd_soc_pcm_runtime *rtd = pcm->private_data;
  288. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  289. struct sport_device *sport_handle = snd_soc_dai_get_drvdata(cpu_dai);
  290. struct snd_pcm_substream *substream = pcm->streams[stream].substream;
  291. struct snd_dma_buffer *buf = &substream->dma_buffer;
  292. size_t size = bf5xx_pcm_hardware.buffer_bytes_max
  293. * sizeof(struct ac97_frame) / 4;
  294. buf->dev.type = SNDRV_DMA_TYPE_DEV;
  295. buf->dev.dev = pcm->card->dev;
  296. buf->private_data = NULL;
  297. buf->area = dma_alloc_coherent(pcm->card->dev, size,
  298. &buf->addr, GFP_KERNEL);
  299. if (!buf->area) {
  300. pr_err("Failed to allocate dma memory\n");
  301. pr_err("Please increase uncached DMA memory region\n");
  302. return -ENOMEM;
  303. }
  304. buf->bytes = size;
  305. pr_debug("%s, area:%p, size:0x%08lx\n", __func__,
  306. buf->area, buf->bytes);
  307. if (stream == SNDRV_PCM_STREAM_PLAYBACK)
  308. sport_handle->tx_buf = buf->area;
  309. else
  310. sport_handle->rx_buf = buf->area;
  311. /*
  312. * Need to allocate local buffer when enable
  313. * MMAP for SPORT working in TMD mode (include AC97).
  314. */
  315. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  316. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  317. if (!sport_handle->tx_dma_buf) {
  318. sport_handle->tx_dma_buf = dma_alloc_coherent(NULL, \
  319. size, &sport_handle->tx_dma_phy, GFP_KERNEL);
  320. if (!sport_handle->tx_dma_buf) {
  321. pr_err("Failed to allocate memory for tx dma buf - Please increase uncached DMA memory region\n");
  322. return -ENOMEM;
  323. } else
  324. memset(sport_handle->tx_dma_buf, 0, size);
  325. } else
  326. memset(sport_handle->tx_dma_buf, 0, size);
  327. } else {
  328. if (!sport_handle->rx_dma_buf) {
  329. sport_handle->rx_dma_buf = dma_alloc_coherent(NULL, \
  330. size, &sport_handle->rx_dma_phy, GFP_KERNEL);
  331. if (!sport_handle->rx_dma_buf) {
  332. pr_err("Failed to allocate memory for rx dma buf - Please increase uncached DMA memory region\n");
  333. return -ENOMEM;
  334. } else
  335. memset(sport_handle->rx_dma_buf, 0, size);
  336. } else
  337. memset(sport_handle->rx_dma_buf, 0, size);
  338. }
  339. #endif
  340. return 0;
  341. }
  342. static void bf5xx_pcm_free_dma_buffers(struct snd_pcm *pcm)
  343. {
  344. struct snd_pcm_substream *substream;
  345. struct snd_dma_buffer *buf;
  346. int stream;
  347. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  348. struct snd_soc_pcm_runtime *rtd = pcm->private_data;
  349. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  350. struct sport_device *sport_handle = snd_soc_dai_get_drvdata(cpu_dai);
  351. size_t size = bf5xx_pcm_hardware.buffer_bytes_max *
  352. sizeof(struct ac97_frame) / 4;
  353. #endif
  354. for (stream = 0; stream < 2; stream++) {
  355. substream = pcm->streams[stream].substream;
  356. if (!substream)
  357. continue;
  358. buf = &substream->dma_buffer;
  359. if (!buf->area)
  360. continue;
  361. dma_free_coherent(NULL, buf->bytes, buf->area, 0);
  362. buf->area = NULL;
  363. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  364. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  365. if (sport_handle->tx_dma_buf)
  366. dma_free_coherent(NULL, size, \
  367. sport_handle->tx_dma_buf, 0);
  368. sport_handle->tx_dma_buf = NULL;
  369. } else {
  370. if (sport_handle->rx_dma_buf)
  371. dma_free_coherent(NULL, size, \
  372. sport_handle->rx_dma_buf, 0);
  373. sport_handle->rx_dma_buf = NULL;
  374. }
  375. #endif
  376. }
  377. }
  378. static int bf5xx_pcm_ac97_new(struct snd_soc_pcm_runtime *rtd)
  379. {
  380. struct snd_card *card = rtd->card->snd_card;
  381. struct snd_pcm *pcm = rtd->pcm;
  382. int ret;
  383. pr_debug("%s enter\n", __func__);
  384. ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
  385. if (ret)
  386. return ret;
  387. if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
  388. ret = bf5xx_pcm_preallocate_dma_buffer(pcm,
  389. SNDRV_PCM_STREAM_PLAYBACK);
  390. if (ret)
  391. goto out;
  392. }
  393. if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
  394. ret = bf5xx_pcm_preallocate_dma_buffer(pcm,
  395. SNDRV_PCM_STREAM_CAPTURE);
  396. if (ret)
  397. goto out;
  398. }
  399. out:
  400. return ret;
  401. }
  402. static struct snd_soc_platform_driver bf5xx_ac97_soc_platform = {
  403. .ops = &bf5xx_pcm_ac97_ops,
  404. .pcm_new = bf5xx_pcm_ac97_new,
  405. .pcm_free = bf5xx_pcm_free_dma_buffers,
  406. };
  407. static int bf5xx_soc_platform_probe(struct platform_device *pdev)
  408. {
  409. return devm_snd_soc_register_platform(&pdev->dev,
  410. &bf5xx_ac97_soc_platform);
  411. }
  412. static struct platform_driver bf5xx_pcm_driver = {
  413. .driver = {
  414. .name = "bfin-ac97-pcm-audio",
  415. },
  416. .probe = bf5xx_soc_platform_probe,
  417. };
  418. module_platform_driver(bf5xx_pcm_driver);
  419. MODULE_AUTHOR("Cliff Cai");
  420. MODULE_DESCRIPTION("ADI Blackfin AC97 PCM DMA module");
  421. MODULE_LICENSE("GPL");