mpc5200_dma.c 14 KB

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  1. /*
  2. * Freescale MPC5200 PSC DMA
  3. * ALSA SoC Platform driver
  4. *
  5. * Copyright (C) 2008 Secret Lab Technologies Ltd.
  6. * Copyright (C) 2009 Jon Smirl, Digispeaker
  7. */
  8. #include <linux/module.h>
  9. #include <linux/of_device.h>
  10. #include <linux/dma-mapping.h>
  11. #include <linux/slab.h>
  12. #include <linux/of_address.h>
  13. #include <linux/of_irq.h>
  14. #include <linux/of_platform.h>
  15. #include <sound/soc.h>
  16. #include <linux/fsl/bestcomm/bestcomm.h>
  17. #include <linux/fsl/bestcomm/gen_bd.h>
  18. #include <asm/mpc52xx_psc.h>
  19. #include "mpc5200_dma.h"
  20. /*
  21. * Interrupt handlers
  22. */
  23. static irqreturn_t psc_dma_status_irq(int irq, void *_psc_dma)
  24. {
  25. struct psc_dma *psc_dma = _psc_dma;
  26. struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
  27. u16 isr;
  28. isr = in_be16(&regs->mpc52xx_psc_isr);
  29. /* Playback underrun error */
  30. if (psc_dma->playback.active && (isr & MPC52xx_PSC_IMR_TXEMP))
  31. psc_dma->stats.underrun_count++;
  32. /* Capture overrun error */
  33. if (psc_dma->capture.active && (isr & MPC52xx_PSC_IMR_ORERR))
  34. psc_dma->stats.overrun_count++;
  35. out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT);
  36. return IRQ_HANDLED;
  37. }
  38. /**
  39. * psc_dma_bcom_enqueue_next_buffer - Enqueue another audio buffer
  40. * @s: pointer to stream private data structure
  41. *
  42. * Enqueues another audio period buffer into the bestcomm queue.
  43. *
  44. * Note: The routine must only be called when there is space available in
  45. * the queue. Otherwise the enqueue will fail and the audio ring buffer
  46. * will get out of sync
  47. */
  48. static void psc_dma_bcom_enqueue_next_buffer(struct psc_dma_stream *s)
  49. {
  50. struct bcom_bd *bd;
  51. /* Prepare and enqueue the next buffer descriptor */
  52. bd = bcom_prepare_next_buffer(s->bcom_task);
  53. bd->status = s->period_bytes;
  54. bd->data[0] = s->runtime->dma_addr + (s->period_next * s->period_bytes);
  55. bcom_submit_next_buffer(s->bcom_task, NULL);
  56. /* Update for next period */
  57. s->period_next = (s->period_next + 1) % s->runtime->periods;
  58. }
  59. /* Bestcomm DMA irq handler */
  60. static irqreturn_t psc_dma_bcom_irq(int irq, void *_psc_dma_stream)
  61. {
  62. struct psc_dma_stream *s = _psc_dma_stream;
  63. spin_lock(&s->psc_dma->lock);
  64. /* For each finished period, dequeue the completed period buffer
  65. * and enqueue a new one in it's place. */
  66. while (bcom_buffer_done(s->bcom_task)) {
  67. bcom_retrieve_buffer(s->bcom_task, NULL, NULL);
  68. s->period_current = (s->period_current+1) % s->runtime->periods;
  69. s->period_count++;
  70. psc_dma_bcom_enqueue_next_buffer(s);
  71. }
  72. spin_unlock(&s->psc_dma->lock);
  73. /* If the stream is active, then also inform the PCM middle layer
  74. * of the period finished event. */
  75. if (s->active)
  76. snd_pcm_period_elapsed(s->stream);
  77. return IRQ_HANDLED;
  78. }
  79. static int psc_dma_hw_free(struct snd_pcm_substream *substream)
  80. {
  81. snd_pcm_set_runtime_buffer(substream, NULL);
  82. return 0;
  83. }
  84. /**
  85. * psc_dma_trigger: start and stop the DMA transfer.
  86. *
  87. * This function is called by ALSA to start, stop, pause, and resume the DMA
  88. * transfer of data.
  89. */
  90. static int psc_dma_trigger(struct snd_pcm_substream *substream, int cmd)
  91. {
  92. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  93. struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(rtd->cpu_dai);
  94. struct snd_pcm_runtime *runtime = substream->runtime;
  95. struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma);
  96. struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
  97. u16 imr;
  98. unsigned long flags;
  99. int i;
  100. switch (cmd) {
  101. case SNDRV_PCM_TRIGGER_START:
  102. dev_dbg(psc_dma->dev, "START: stream=%i fbits=%u ps=%u #p=%u\n",
  103. substream->pstr->stream, runtime->frame_bits,
  104. (int)runtime->period_size, runtime->periods);
  105. s->period_bytes = frames_to_bytes(runtime,
  106. runtime->period_size);
  107. s->period_next = 0;
  108. s->period_current = 0;
  109. s->active = 1;
  110. s->period_count = 0;
  111. s->runtime = runtime;
  112. /* Fill up the bestcomm bd queue and enable DMA.
  113. * This will begin filling the PSC's fifo.
  114. */
  115. spin_lock_irqsave(&psc_dma->lock, flags);
  116. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  117. bcom_gen_bd_rx_reset(s->bcom_task);
  118. else
  119. bcom_gen_bd_tx_reset(s->bcom_task);
  120. for (i = 0; i < runtime->periods; i++)
  121. if (!bcom_queue_full(s->bcom_task))
  122. psc_dma_bcom_enqueue_next_buffer(s);
  123. bcom_enable(s->bcom_task);
  124. spin_unlock_irqrestore(&psc_dma->lock, flags);
  125. out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT);
  126. break;
  127. case SNDRV_PCM_TRIGGER_STOP:
  128. dev_dbg(psc_dma->dev, "STOP: stream=%i periods_count=%i\n",
  129. substream->pstr->stream, s->period_count);
  130. s->active = 0;
  131. spin_lock_irqsave(&psc_dma->lock, flags);
  132. bcom_disable(s->bcom_task);
  133. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  134. bcom_gen_bd_rx_reset(s->bcom_task);
  135. else
  136. bcom_gen_bd_tx_reset(s->bcom_task);
  137. spin_unlock_irqrestore(&psc_dma->lock, flags);
  138. break;
  139. default:
  140. dev_dbg(psc_dma->dev, "unhandled trigger: stream=%i cmd=%i\n",
  141. substream->pstr->stream, cmd);
  142. return -EINVAL;
  143. }
  144. /* Update interrupt enable settings */
  145. imr = 0;
  146. if (psc_dma->playback.active)
  147. imr |= MPC52xx_PSC_IMR_TXEMP;
  148. if (psc_dma->capture.active)
  149. imr |= MPC52xx_PSC_IMR_ORERR;
  150. out_be16(&regs->isr_imr.imr, psc_dma->imr | imr);
  151. return 0;
  152. }
  153. /* ---------------------------------------------------------------------
  154. * The PSC DMA 'ASoC platform' driver
  155. *
  156. * Can be referenced by an 'ASoC machine' driver
  157. * This driver only deals with the audio bus; it doesn't have any
  158. * interaction with the attached codec
  159. */
  160. static const struct snd_pcm_hardware psc_dma_hardware = {
  161. .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  162. SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
  163. SNDRV_PCM_INFO_BATCH,
  164. .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE |
  165. SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE,
  166. .period_bytes_max = 1024 * 1024,
  167. .period_bytes_min = 32,
  168. .periods_min = 2,
  169. .periods_max = 256,
  170. .buffer_bytes_max = 2 * 1024 * 1024,
  171. .fifo_size = 512,
  172. };
  173. static int psc_dma_open(struct snd_pcm_substream *substream)
  174. {
  175. struct snd_pcm_runtime *runtime = substream->runtime;
  176. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  177. struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(rtd->cpu_dai);
  178. struct psc_dma_stream *s;
  179. int rc;
  180. dev_dbg(psc_dma->dev, "psc_dma_open(substream=%p)\n", substream);
  181. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  182. s = &psc_dma->capture;
  183. else
  184. s = &psc_dma->playback;
  185. snd_soc_set_runtime_hwparams(substream, &psc_dma_hardware);
  186. rc = snd_pcm_hw_constraint_integer(runtime,
  187. SNDRV_PCM_HW_PARAM_PERIODS);
  188. if (rc < 0) {
  189. dev_err(substream->pcm->card->dev, "invalid buffer size\n");
  190. return rc;
  191. }
  192. s->stream = substream;
  193. return 0;
  194. }
  195. static int psc_dma_close(struct snd_pcm_substream *substream)
  196. {
  197. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  198. struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(rtd->cpu_dai);
  199. struct psc_dma_stream *s;
  200. dev_dbg(psc_dma->dev, "psc_dma_close(substream=%p)\n", substream);
  201. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  202. s = &psc_dma->capture;
  203. else
  204. s = &psc_dma->playback;
  205. if (!psc_dma->playback.active &&
  206. !psc_dma->capture.active) {
  207. /* Disable all interrupts and reset the PSC */
  208. out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
  209. out_8(&psc_dma->psc_regs->command, 4 << 4); /* reset error */
  210. }
  211. s->stream = NULL;
  212. return 0;
  213. }
  214. static snd_pcm_uframes_t
  215. psc_dma_pointer(struct snd_pcm_substream *substream)
  216. {
  217. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  218. struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(rtd->cpu_dai);
  219. struct psc_dma_stream *s;
  220. dma_addr_t count;
  221. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  222. s = &psc_dma->capture;
  223. else
  224. s = &psc_dma->playback;
  225. count = s->period_current * s->period_bytes;
  226. return bytes_to_frames(substream->runtime, count);
  227. }
  228. static int
  229. psc_dma_hw_params(struct snd_pcm_substream *substream,
  230. struct snd_pcm_hw_params *params)
  231. {
  232. snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
  233. return 0;
  234. }
  235. static struct snd_pcm_ops psc_dma_ops = {
  236. .open = psc_dma_open,
  237. .close = psc_dma_close,
  238. .hw_free = psc_dma_hw_free,
  239. .ioctl = snd_pcm_lib_ioctl,
  240. .pointer = psc_dma_pointer,
  241. .trigger = psc_dma_trigger,
  242. .hw_params = psc_dma_hw_params,
  243. };
  244. static int psc_dma_new(struct snd_soc_pcm_runtime *rtd)
  245. {
  246. struct snd_card *card = rtd->card->snd_card;
  247. struct snd_soc_dai *dai = rtd->cpu_dai;
  248. struct snd_pcm *pcm = rtd->pcm;
  249. struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(rtd->cpu_dai);
  250. size_t size = psc_dma_hardware.buffer_bytes_max;
  251. int rc;
  252. dev_dbg(rtd->platform->dev, "psc_dma_new(card=%p, dai=%p, pcm=%p)\n",
  253. card, dai, pcm);
  254. rc = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
  255. if (rc)
  256. return rc;
  257. if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
  258. rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev,
  259. size, &pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream->dma_buffer);
  260. if (rc)
  261. goto playback_alloc_err;
  262. }
  263. if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
  264. rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev,
  265. size, &pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream->dma_buffer);
  266. if (rc)
  267. goto capture_alloc_err;
  268. }
  269. return 0;
  270. capture_alloc_err:
  271. if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream)
  272. snd_dma_free_pages(&pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream->dma_buffer);
  273. playback_alloc_err:
  274. dev_err(card->dev, "Cannot allocate buffer(s)\n");
  275. return -ENOMEM;
  276. }
  277. static void psc_dma_free(struct snd_pcm *pcm)
  278. {
  279. struct snd_soc_pcm_runtime *rtd = pcm->private_data;
  280. struct snd_pcm_substream *substream;
  281. int stream;
  282. dev_dbg(rtd->platform->dev, "psc_dma_free(pcm=%p)\n", pcm);
  283. for (stream = 0; stream < 2; stream++) {
  284. substream = pcm->streams[stream].substream;
  285. if (substream) {
  286. snd_dma_free_pages(&substream->dma_buffer);
  287. substream->dma_buffer.area = NULL;
  288. substream->dma_buffer.addr = 0;
  289. }
  290. }
  291. }
  292. static struct snd_soc_platform_driver mpc5200_audio_dma_platform = {
  293. .ops = &psc_dma_ops,
  294. .pcm_new = &psc_dma_new,
  295. .pcm_free = &psc_dma_free,
  296. };
  297. int mpc5200_audio_dma_create(struct platform_device *op)
  298. {
  299. phys_addr_t fifo;
  300. struct psc_dma *psc_dma;
  301. struct resource res;
  302. int size, irq, rc;
  303. const __be32 *prop;
  304. void __iomem *regs;
  305. int ret;
  306. /* Fetch the registers and IRQ of the PSC */
  307. irq = irq_of_parse_and_map(op->dev.of_node, 0);
  308. if (of_address_to_resource(op->dev.of_node, 0, &res)) {
  309. dev_err(&op->dev, "Missing reg property\n");
  310. return -ENODEV;
  311. }
  312. regs = ioremap(res.start, resource_size(&res));
  313. if (!regs) {
  314. dev_err(&op->dev, "Could not map registers\n");
  315. return -ENODEV;
  316. }
  317. /* Allocate and initialize the driver private data */
  318. psc_dma = kzalloc(sizeof *psc_dma, GFP_KERNEL);
  319. if (!psc_dma) {
  320. ret = -ENOMEM;
  321. goto out_unmap;
  322. }
  323. /* Get the PSC ID */
  324. prop = of_get_property(op->dev.of_node, "cell-index", &size);
  325. if (!prop || size < sizeof *prop) {
  326. ret = -ENODEV;
  327. goto out_free;
  328. }
  329. spin_lock_init(&psc_dma->lock);
  330. mutex_init(&psc_dma->mutex);
  331. psc_dma->id = be32_to_cpu(*prop);
  332. psc_dma->irq = irq;
  333. psc_dma->psc_regs = regs;
  334. psc_dma->fifo_regs = regs + sizeof *psc_dma->psc_regs;
  335. psc_dma->dev = &op->dev;
  336. psc_dma->playback.psc_dma = psc_dma;
  337. psc_dma->capture.psc_dma = psc_dma;
  338. snprintf(psc_dma->name, sizeof psc_dma->name, "PSC%u", psc_dma->id);
  339. /* Find the address of the fifo data registers and setup the
  340. * DMA tasks */
  341. fifo = res.start + offsetof(struct mpc52xx_psc, buffer.buffer_32);
  342. psc_dma->capture.bcom_task =
  343. bcom_psc_gen_bd_rx_init(psc_dma->id, 10, fifo, 512);
  344. psc_dma->playback.bcom_task =
  345. bcom_psc_gen_bd_tx_init(psc_dma->id, 10, fifo);
  346. if (!psc_dma->capture.bcom_task ||
  347. !psc_dma->playback.bcom_task) {
  348. dev_err(&op->dev, "Could not allocate bestcomm tasks\n");
  349. ret = -ENODEV;
  350. goto out_free;
  351. }
  352. /* Disable all interrupts and reset the PSC */
  353. out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
  354. /* reset receiver */
  355. out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_RX);
  356. /* reset transmitter */
  357. out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_TX);
  358. /* reset error */
  359. out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_ERR_STAT);
  360. /* reset mode */
  361. out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_SEL_MODE_REG_1);
  362. /* Set up mode register;
  363. * First write: RxRdy (FIFO Alarm) generates rx FIFO irq
  364. * Second write: register Normal mode for non loopback
  365. */
  366. out_8(&psc_dma->psc_regs->mode, 0);
  367. out_8(&psc_dma->psc_regs->mode, 0);
  368. /* Set the TX and RX fifo alarm thresholds */
  369. out_be16(&psc_dma->fifo_regs->rfalarm, 0x100);
  370. out_8(&psc_dma->fifo_regs->rfcntl, 0x4);
  371. out_be16(&psc_dma->fifo_regs->tfalarm, 0x100);
  372. out_8(&psc_dma->fifo_regs->tfcntl, 0x7);
  373. /* Lookup the IRQ numbers */
  374. psc_dma->playback.irq =
  375. bcom_get_task_irq(psc_dma->playback.bcom_task);
  376. psc_dma->capture.irq =
  377. bcom_get_task_irq(psc_dma->capture.bcom_task);
  378. rc = request_irq(psc_dma->irq, &psc_dma_status_irq, IRQF_SHARED,
  379. "psc-dma-status", psc_dma);
  380. rc |= request_irq(psc_dma->capture.irq, &psc_dma_bcom_irq, IRQF_SHARED,
  381. "psc-dma-capture", &psc_dma->capture);
  382. rc |= request_irq(psc_dma->playback.irq, &psc_dma_bcom_irq, IRQF_SHARED,
  383. "psc-dma-playback", &psc_dma->playback);
  384. if (rc) {
  385. ret = -ENODEV;
  386. goto out_irq;
  387. }
  388. /* Save what we've done so it can be found again later */
  389. dev_set_drvdata(&op->dev, psc_dma);
  390. /* Tell the ASoC OF helpers about it */
  391. return snd_soc_register_platform(&op->dev, &mpc5200_audio_dma_platform);
  392. out_irq:
  393. free_irq(psc_dma->irq, psc_dma);
  394. free_irq(psc_dma->capture.irq, &psc_dma->capture);
  395. free_irq(psc_dma->playback.irq, &psc_dma->playback);
  396. out_free:
  397. kfree(psc_dma);
  398. out_unmap:
  399. iounmap(regs);
  400. return ret;
  401. }
  402. EXPORT_SYMBOL_GPL(mpc5200_audio_dma_create);
  403. int mpc5200_audio_dma_destroy(struct platform_device *op)
  404. {
  405. struct psc_dma *psc_dma = dev_get_drvdata(&op->dev);
  406. dev_dbg(&op->dev, "mpc5200_audio_dma_destroy()\n");
  407. snd_soc_unregister_platform(&op->dev);
  408. bcom_gen_bd_rx_release(psc_dma->capture.bcom_task);
  409. bcom_gen_bd_tx_release(psc_dma->playback.bcom_task);
  410. /* Release irqs */
  411. free_irq(psc_dma->irq, psc_dma);
  412. free_irq(psc_dma->capture.irq, &psc_dma->capture);
  413. free_irq(psc_dma->playback.irq, &psc_dma->playback);
  414. iounmap(psc_dma->psc_regs);
  415. kfree(psc_dma);
  416. dev_set_drvdata(&op->dev, NULL);
  417. return 0;
  418. }
  419. EXPORT_SYMBOL_GPL(mpc5200_audio_dma_destroy);
  420. MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
  421. MODULE_DESCRIPTION("Freescale MPC5200 PSC in DMA mode ASoC Driver");
  422. MODULE_LICENSE("GPL");