sst-dsp.c 11 KB

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  1. /*
  2. * Intel Smart Sound Technology (SST) DSP Core Driver
  3. *
  4. * Copyright (C) 2013, Intel Corporation. All rights reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License version
  8. * 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. */
  16. #include <linux/slab.h>
  17. #include <linux/export.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/module.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/io.h>
  22. #include <linux/delay.h>
  23. #include "sst-dsp.h"
  24. #include "sst-dsp-priv.h"
  25. #define CREATE_TRACE_POINTS
  26. #include <trace/events/intel-sst.h>
  27. /* Internal generic low-level SST IO functions - can be overidden */
  28. void sst_shim32_write(void __iomem *addr, u32 offset, u32 value)
  29. {
  30. writel(value, addr + offset);
  31. }
  32. EXPORT_SYMBOL_GPL(sst_shim32_write);
  33. u32 sst_shim32_read(void __iomem *addr, u32 offset)
  34. {
  35. return readl(addr + offset);
  36. }
  37. EXPORT_SYMBOL_GPL(sst_shim32_read);
  38. void sst_shim32_write64(void __iomem *addr, u32 offset, u64 value)
  39. {
  40. memcpy_toio(addr + offset, &value, sizeof(value));
  41. }
  42. EXPORT_SYMBOL_GPL(sst_shim32_write64);
  43. u64 sst_shim32_read64(void __iomem *addr, u32 offset)
  44. {
  45. u64 val;
  46. memcpy_fromio(&val, addr + offset, sizeof(val));
  47. return val;
  48. }
  49. EXPORT_SYMBOL_GPL(sst_shim32_read64);
  50. static inline void _sst_memcpy_toio_32(volatile u32 __iomem *dest,
  51. u32 *src, size_t bytes)
  52. {
  53. int i, words = bytes >> 2;
  54. for (i = 0; i < words; i++)
  55. writel(src[i], dest + i);
  56. }
  57. static inline void _sst_memcpy_fromio_32(u32 *dest,
  58. const volatile __iomem u32 *src, size_t bytes)
  59. {
  60. int i, words = bytes >> 2;
  61. for (i = 0; i < words; i++)
  62. dest[i] = readl(src + i);
  63. }
  64. void sst_memcpy_toio_32(struct sst_dsp *sst,
  65. void __iomem *dest, void *src, size_t bytes)
  66. {
  67. _sst_memcpy_toio_32(dest, src, bytes);
  68. }
  69. EXPORT_SYMBOL_GPL(sst_memcpy_toio_32);
  70. void sst_memcpy_fromio_32(struct sst_dsp *sst, void *dest,
  71. void __iomem *src, size_t bytes)
  72. {
  73. _sst_memcpy_fromio_32(dest, src, bytes);
  74. }
  75. EXPORT_SYMBOL_GPL(sst_memcpy_fromio_32);
  76. /* Public API */
  77. void sst_dsp_shim_write(struct sst_dsp *sst, u32 offset, u32 value)
  78. {
  79. unsigned long flags;
  80. spin_lock_irqsave(&sst->spinlock, flags);
  81. sst->ops->write(sst->addr.shim, offset, value);
  82. spin_unlock_irqrestore(&sst->spinlock, flags);
  83. }
  84. EXPORT_SYMBOL_GPL(sst_dsp_shim_write);
  85. u32 sst_dsp_shim_read(struct sst_dsp *sst, u32 offset)
  86. {
  87. unsigned long flags;
  88. u32 val;
  89. spin_lock_irqsave(&sst->spinlock, flags);
  90. val = sst->ops->read(sst->addr.shim, offset);
  91. spin_unlock_irqrestore(&sst->spinlock, flags);
  92. return val;
  93. }
  94. EXPORT_SYMBOL_GPL(sst_dsp_shim_read);
  95. void sst_dsp_shim_write64(struct sst_dsp *sst, u32 offset, u64 value)
  96. {
  97. unsigned long flags;
  98. spin_lock_irqsave(&sst->spinlock, flags);
  99. sst->ops->write64(sst->addr.shim, offset, value);
  100. spin_unlock_irqrestore(&sst->spinlock, flags);
  101. }
  102. EXPORT_SYMBOL_GPL(sst_dsp_shim_write64);
  103. u64 sst_dsp_shim_read64(struct sst_dsp *sst, u32 offset)
  104. {
  105. unsigned long flags;
  106. u64 val;
  107. spin_lock_irqsave(&sst->spinlock, flags);
  108. val = sst->ops->read64(sst->addr.shim, offset);
  109. spin_unlock_irqrestore(&sst->spinlock, flags);
  110. return val;
  111. }
  112. EXPORT_SYMBOL_GPL(sst_dsp_shim_read64);
  113. void sst_dsp_shim_write_unlocked(struct sst_dsp *sst, u32 offset, u32 value)
  114. {
  115. sst->ops->write(sst->addr.shim, offset, value);
  116. }
  117. EXPORT_SYMBOL_GPL(sst_dsp_shim_write_unlocked);
  118. u32 sst_dsp_shim_read_unlocked(struct sst_dsp *sst, u32 offset)
  119. {
  120. return sst->ops->read(sst->addr.shim, offset);
  121. }
  122. EXPORT_SYMBOL_GPL(sst_dsp_shim_read_unlocked);
  123. void sst_dsp_shim_write64_unlocked(struct sst_dsp *sst, u32 offset, u64 value)
  124. {
  125. sst->ops->write64(sst->addr.shim, offset, value);
  126. }
  127. EXPORT_SYMBOL_GPL(sst_dsp_shim_write64_unlocked);
  128. u64 sst_dsp_shim_read64_unlocked(struct sst_dsp *sst, u32 offset)
  129. {
  130. return sst->ops->read64(sst->addr.shim, offset);
  131. }
  132. EXPORT_SYMBOL_GPL(sst_dsp_shim_read64_unlocked);
  133. int sst_dsp_shim_update_bits_unlocked(struct sst_dsp *sst, u32 offset,
  134. u32 mask, u32 value)
  135. {
  136. bool change;
  137. unsigned int old, new;
  138. u32 ret;
  139. ret = sst_dsp_shim_read_unlocked(sst, offset);
  140. old = ret;
  141. new = (old & (~mask)) | (value & mask);
  142. change = (old != new);
  143. if (change)
  144. sst_dsp_shim_write_unlocked(sst, offset, new);
  145. return change;
  146. }
  147. EXPORT_SYMBOL_GPL(sst_dsp_shim_update_bits_unlocked);
  148. int sst_dsp_shim_update_bits64_unlocked(struct sst_dsp *sst, u32 offset,
  149. u64 mask, u64 value)
  150. {
  151. bool change;
  152. u64 old, new;
  153. old = sst_dsp_shim_read64_unlocked(sst, offset);
  154. new = (old & (~mask)) | (value & mask);
  155. change = (old != new);
  156. if (change)
  157. sst_dsp_shim_write64_unlocked(sst, offset, new);
  158. return change;
  159. }
  160. EXPORT_SYMBOL_GPL(sst_dsp_shim_update_bits64_unlocked);
  161. /* This is for registers bits with attribute RWC */
  162. void sst_dsp_shim_update_bits_forced_unlocked(struct sst_dsp *sst, u32 offset,
  163. u32 mask, u32 value)
  164. {
  165. unsigned int old, new;
  166. u32 ret;
  167. ret = sst_dsp_shim_read_unlocked(sst, offset);
  168. old = ret;
  169. new = (old & (~mask)) | (value & mask);
  170. sst_dsp_shim_write_unlocked(sst, offset, new);
  171. }
  172. EXPORT_SYMBOL_GPL(sst_dsp_shim_update_bits_forced_unlocked);
  173. int sst_dsp_shim_update_bits(struct sst_dsp *sst, u32 offset,
  174. u32 mask, u32 value)
  175. {
  176. unsigned long flags;
  177. bool change;
  178. spin_lock_irqsave(&sst->spinlock, flags);
  179. change = sst_dsp_shim_update_bits_unlocked(sst, offset, mask, value);
  180. spin_unlock_irqrestore(&sst->spinlock, flags);
  181. return change;
  182. }
  183. EXPORT_SYMBOL_GPL(sst_dsp_shim_update_bits);
  184. int sst_dsp_shim_update_bits64(struct sst_dsp *sst, u32 offset,
  185. u64 mask, u64 value)
  186. {
  187. unsigned long flags;
  188. bool change;
  189. spin_lock_irqsave(&sst->spinlock, flags);
  190. change = sst_dsp_shim_update_bits64_unlocked(sst, offset, mask, value);
  191. spin_unlock_irqrestore(&sst->spinlock, flags);
  192. return change;
  193. }
  194. EXPORT_SYMBOL_GPL(sst_dsp_shim_update_bits64);
  195. /* This is for registers bits with attribute RWC */
  196. void sst_dsp_shim_update_bits_forced(struct sst_dsp *sst, u32 offset,
  197. u32 mask, u32 value)
  198. {
  199. unsigned long flags;
  200. spin_lock_irqsave(&sst->spinlock, flags);
  201. sst_dsp_shim_update_bits_forced_unlocked(sst, offset, mask, value);
  202. spin_unlock_irqrestore(&sst->spinlock, flags);
  203. }
  204. EXPORT_SYMBOL_GPL(sst_dsp_shim_update_bits_forced);
  205. int sst_dsp_register_poll(struct sst_dsp *ctx, u32 offset, u32 mask,
  206. u32 target, u32 timeout, char *operation)
  207. {
  208. int time, ret;
  209. u32 reg;
  210. bool done = false;
  211. /*
  212. * we will poll for couple of ms using mdelay, if not successful
  213. * then go to longer sleep using usleep_range
  214. */
  215. /* check if set state successful */
  216. for (time = 0; time < 5; time++) {
  217. if ((sst_dsp_shim_read_unlocked(ctx, offset) & mask) == target) {
  218. done = true;
  219. break;
  220. }
  221. mdelay(1);
  222. }
  223. if (done == false) {
  224. /* sleeping in 10ms steps so adjust timeout value */
  225. timeout /= 10;
  226. for (time = 0; time < timeout; time++) {
  227. if ((sst_dsp_shim_read_unlocked(ctx, offset) & mask) == target)
  228. break;
  229. usleep_range(5000, 10000);
  230. }
  231. }
  232. reg = sst_dsp_shim_read_unlocked(ctx, offset);
  233. dev_info(ctx->dev, "FW Poll Status: reg=%#x %s %s\n", reg, operation,
  234. (time < timeout) ? "successful" : "timedout");
  235. ret = time < timeout ? 0 : -ETIME;
  236. return ret;
  237. }
  238. EXPORT_SYMBOL_GPL(sst_dsp_register_poll);
  239. void sst_dsp_dump(struct sst_dsp *sst)
  240. {
  241. if (sst->ops->dump)
  242. sst->ops->dump(sst);
  243. }
  244. EXPORT_SYMBOL_GPL(sst_dsp_dump);
  245. void sst_dsp_reset(struct sst_dsp *sst)
  246. {
  247. if (sst->ops->reset)
  248. sst->ops->reset(sst);
  249. }
  250. EXPORT_SYMBOL_GPL(sst_dsp_reset);
  251. int sst_dsp_boot(struct sst_dsp *sst)
  252. {
  253. if (sst->ops->boot)
  254. sst->ops->boot(sst);
  255. return 0;
  256. }
  257. EXPORT_SYMBOL_GPL(sst_dsp_boot);
  258. int sst_dsp_wake(struct sst_dsp *sst)
  259. {
  260. if (sst->ops->wake)
  261. return sst->ops->wake(sst);
  262. return 0;
  263. }
  264. EXPORT_SYMBOL_GPL(sst_dsp_wake);
  265. void sst_dsp_sleep(struct sst_dsp *sst)
  266. {
  267. if (sst->ops->sleep)
  268. sst->ops->sleep(sst);
  269. }
  270. EXPORT_SYMBOL_GPL(sst_dsp_sleep);
  271. void sst_dsp_stall(struct sst_dsp *sst)
  272. {
  273. if (sst->ops->stall)
  274. sst->ops->stall(sst);
  275. }
  276. EXPORT_SYMBOL_GPL(sst_dsp_stall);
  277. void sst_dsp_ipc_msg_tx(struct sst_dsp *dsp, u32 msg)
  278. {
  279. sst_dsp_shim_write_unlocked(dsp, SST_IPCX, msg | SST_IPCX_BUSY);
  280. trace_sst_ipc_msg_tx(msg);
  281. }
  282. EXPORT_SYMBOL_GPL(sst_dsp_ipc_msg_tx);
  283. u32 sst_dsp_ipc_msg_rx(struct sst_dsp *dsp)
  284. {
  285. u32 msg;
  286. msg = sst_dsp_shim_read_unlocked(dsp, SST_IPCX);
  287. trace_sst_ipc_msg_rx(msg);
  288. return msg;
  289. }
  290. EXPORT_SYMBOL_GPL(sst_dsp_ipc_msg_rx);
  291. int sst_dsp_mailbox_init(struct sst_dsp *sst, u32 inbox_offset, size_t inbox_size,
  292. u32 outbox_offset, size_t outbox_size)
  293. {
  294. sst->mailbox.in_base = sst->addr.lpe + inbox_offset;
  295. sst->mailbox.out_base = sst->addr.lpe + outbox_offset;
  296. sst->mailbox.in_size = inbox_size;
  297. sst->mailbox.out_size = outbox_size;
  298. return 0;
  299. }
  300. EXPORT_SYMBOL_GPL(sst_dsp_mailbox_init);
  301. void sst_dsp_outbox_write(struct sst_dsp *sst, void *message, size_t bytes)
  302. {
  303. u32 i;
  304. trace_sst_ipc_outbox_write(bytes);
  305. memcpy_toio(sst->mailbox.out_base, message, bytes);
  306. for (i = 0; i < bytes; i += 4)
  307. trace_sst_ipc_outbox_wdata(i, *(u32 *)(message + i));
  308. }
  309. EXPORT_SYMBOL_GPL(sst_dsp_outbox_write);
  310. void sst_dsp_outbox_read(struct sst_dsp *sst, void *message, size_t bytes)
  311. {
  312. u32 i;
  313. trace_sst_ipc_outbox_read(bytes);
  314. memcpy_fromio(message, sst->mailbox.out_base, bytes);
  315. for (i = 0; i < bytes; i += 4)
  316. trace_sst_ipc_outbox_rdata(i, *(u32 *)(message + i));
  317. }
  318. EXPORT_SYMBOL_GPL(sst_dsp_outbox_read);
  319. void sst_dsp_inbox_write(struct sst_dsp *sst, void *message, size_t bytes)
  320. {
  321. u32 i;
  322. trace_sst_ipc_inbox_write(bytes);
  323. memcpy_toio(sst->mailbox.in_base, message, bytes);
  324. for (i = 0; i < bytes; i += 4)
  325. trace_sst_ipc_inbox_wdata(i, *(u32 *)(message + i));
  326. }
  327. EXPORT_SYMBOL_GPL(sst_dsp_inbox_write);
  328. void sst_dsp_inbox_read(struct sst_dsp *sst, void *message, size_t bytes)
  329. {
  330. u32 i;
  331. trace_sst_ipc_inbox_read(bytes);
  332. memcpy_fromio(message, sst->mailbox.in_base, bytes);
  333. for (i = 0; i < bytes; i += 4)
  334. trace_sst_ipc_inbox_rdata(i, *(u32 *)(message + i));
  335. }
  336. EXPORT_SYMBOL_GPL(sst_dsp_inbox_read);
  337. #if IS_ENABLED(CONFIG_DW_DMAC_CORE)
  338. struct sst_dsp *sst_dsp_new(struct device *dev,
  339. struct sst_dsp_device *sst_dev, struct sst_pdata *pdata)
  340. {
  341. struct sst_dsp *sst;
  342. int err;
  343. dev_dbg(dev, "initialising audio DSP id 0x%x\n", pdata->id);
  344. sst = devm_kzalloc(dev, sizeof(*sst), GFP_KERNEL);
  345. if (sst == NULL)
  346. return NULL;
  347. spin_lock_init(&sst->spinlock);
  348. mutex_init(&sst->mutex);
  349. sst->dev = dev;
  350. sst->dma_dev = pdata->dma_dev;
  351. sst->thread_context = sst_dev->thread_context;
  352. sst->sst_dev = sst_dev;
  353. sst->id = pdata->id;
  354. sst->irq = pdata->irq;
  355. sst->ops = sst_dev->ops;
  356. sst->pdata = pdata;
  357. INIT_LIST_HEAD(&sst->used_block_list);
  358. INIT_LIST_HEAD(&sst->free_block_list);
  359. INIT_LIST_HEAD(&sst->module_list);
  360. INIT_LIST_HEAD(&sst->fw_list);
  361. INIT_LIST_HEAD(&sst->scratch_block_list);
  362. /* Initialise SST Audio DSP */
  363. if (sst->ops->init) {
  364. err = sst->ops->init(sst, pdata);
  365. if (err < 0)
  366. return NULL;
  367. }
  368. /* Register the ISR */
  369. err = request_threaded_irq(sst->irq, sst->ops->irq_handler,
  370. sst_dev->thread, IRQF_SHARED, "AudioDSP", sst);
  371. if (err)
  372. goto irq_err;
  373. err = sst_dma_new(sst);
  374. if (err)
  375. dev_warn(dev, "sst_dma_new failed %d\n", err);
  376. return sst;
  377. irq_err:
  378. if (sst->ops->free)
  379. sst->ops->free(sst);
  380. return NULL;
  381. }
  382. EXPORT_SYMBOL_GPL(sst_dsp_new);
  383. void sst_dsp_free(struct sst_dsp *sst)
  384. {
  385. free_irq(sst->irq, sst);
  386. if (sst->ops->free)
  387. sst->ops->free(sst);
  388. sst_dma_free(sst->dma);
  389. }
  390. EXPORT_SYMBOL_GPL(sst_dsp_free);
  391. #endif
  392. /* Module information */
  393. MODULE_AUTHOR("Liam Girdwood");
  394. MODULE_DESCRIPTION("Intel SST Core");
  395. MODULE_LICENSE("GPL v2");